Severing by tearing or breaking – Methods – With preliminary weakening
Patent
1994-05-17
1998-04-21
Peterson, Kenneth E.
Severing by tearing or breaking
Methods
With preliminary weakening
225 1, B26F 300
Patent
active
057409536
DESCRIPTION:
BRIEF SUMMARY
FIELD AND BACKGROUND OF THE INVENTION
The present invention relates to a method and apparatus for cleaving semiconductor wafers. The invention is particularly useful for cleaving semiconductor wafers in order to inspect a cross-section of the wafer at a specified location, designated by a target feature or features (hereinafter a target feature) on a workface of the wafer, and the invention is therefore described below with respect to such an application.
A semiconductor wafer includes several thin layers of insulating and conducting materials deposited sequentially on the workface of a semiconductor substrate. The processes for depositing these materials are very complex and must be performed with a high degree of precision in order to minimize manufacturing faults which substantially lower yields. For this reason, the manufacturing processes include quality controls for cross-sectioning and inspecting selected target features on the workface of the wafer. For the inspection to be meaningful, the cross-sectioning of the wafer must essentially (within a few microns) coincide with the target feature.
Such cross-sectioning of a wafer is generally performed manually, by first producing a coarse cleavage with a tolerance of approximately 1 mm off the designated target feature, followed by manual grinding or the like in order to achieve the desired final tolerance in the micron range. Such manual cross-sectioning is extremely time consuming (usually requiring several working hours), inaccurate, and highly dependent on the proficiency of the operator.
In an attempt to overcome the above shortcomings of the manual cross-sectioning method, some mechanical methods have been proposed. Thus, in a paper entitled "Meeting the Challenge of Dicing and Fracturing Brittle III-V Materials" by Barry F. Regan and Glen B. Regan, of Dynatex Corporation, Redwood City, Calif., published November 1989 in "Microelectronic Manufacturing and Testing", it was suggested to scribe a line on the upper workface of a wafer, and subsequently to induce a shock that propagates within the wafer essentially normal to the scribed surface, e.g., by impacting the opposite wafer face. Such a method, however, would not be suitable for cleaving a wafer for inspecting a target feature on the workface during quality control of manufacturing processes performed on the wafer. Thus, such a scribed line applied across the workface of the wafer could preclude the target feature from being inspected in the form it comes out of the manufacturing process as required by quality control. Moreover, such a scribed line crossing the entire upper, workface of the wafer would hardly ever exactly coincide with a natural cleavage plane, so that a jagged fracture would generally be produced, which is undesirable for qualtity control inspection. A similar semi-mechanical method for fracturing wafers in order to produce dies in cubic form is described in U.S. Pat. No. 4,653,680, but such a method would also have the above-described drawbacks when used for cleaving a relatively thin semi-conductor in order to permit inspecting a target feature on a relatively large-area workface of the wafer.
It would therefore be highly desirable to provide an improved method and apparatus for cleaving a relatively thin semiconductor wafer in order to permit inspecting a target feature on a relatively large-area workface of the wafer for quality control purposes.
BRIEF SUMMARY OF THE INVENTION
According to one aspect of the present invention, there is provided a method of cleaving a relatively thin article for inspecting a target feature on a large-area workface thereof circumscribed by small-area lateral faces defining the thickness of the article, comprising the steps: article on one side of the target feature; an opposite side thereof with respect to the target feature, a shock wave in alignment with the target feature and the indentation on the first lateral face, to split the article along a cleavage plane coinciding with the target feature and the indentation.
According to furth
REFERENCES:
patent: 3230625 (1966-01-01), Meyer
patent: 3247576 (1966-04-01), Dill, Jr. et al.
patent: 3384279 (1968-05-01), Grechus
patent: 3494521 (1970-02-01), Hellstrom
patent: 3572564 (1971-03-01), Fleming
patent: 3680213 (1972-08-01), Reichert
patent: 3756482 (1973-09-01), De Torre
patent: 3790051 (1974-02-01), Moore
patent: 3901423 (1975-08-01), Hillberry et al.
patent: 3920168 (1975-11-01), Regan et al.
patent: 4049167 (1977-09-01), Guissard
patent: 4216004 (1980-08-01), Brehm et al.
patent: 4228937 (1980-10-01), Tocci
patent: 4244348 (1981-01-01), Wilkes
patent: 4498451 (1985-02-01), Beltz et al.
patent: 4647300 (1987-03-01), Sheets
patent: 4653680 (1987-03-01), Regan
patent: 4693403 (1987-09-01), Sprouse
patent: 4775085 (1988-10-01), Ishizuka
patent: 4955357 (1990-09-01), Takeguchi et al.
patent: 5133491 (1992-07-01), Correll et al.
patent: 5327625 (1994-07-01), Clark, Jr. et al.
patent: 5381713 (1995-01-01), Smith
patent: 5551618 (1996-09-01), Shinozaki et al.
Chen Elik
Kaufman Kalman
Mazor Isaac
Smith Colin
Vilenski Dan
Peterson Kenneth E.
Sela Semiconductor Engineering Laboratories
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