Method and apparatus for chemically generating terminal bumps on

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204224R, 204297W, 205123, H01L 2144, H01L 21288

Patent

active

058044566

DESCRIPTION:

BRIEF SUMMARY
The present invention relates to a method according to the preamble of claim 1 for electroless plating of bonding bumps on semiconductor wafers.
The method also concerns an apparatus suited for implementing said method.
To achieve a faster and more reliable bonding method (e.g., Tape Automated Bonding (TAB), Flip-Chip Bonding) than the customary wire-bonding directly to the aluminium layer of a semiconductor chip, metallic bonding bumps can be plated on the aluminium bonding areas. Both the electrochemical plating method and the "electroless" plating occurring without the help of an externally applied voltage are well known in the art. However, the electroless plating takes place via an extremely critical process not so much favoured in the formation of bonding bumps on semiconductor wafers.
Bonding bumps made through an electroless plating process typically are 20 .mu.m thick. Typical metal for the bump is nickel, for instance, on which further is formed a gold, tin or tin-lead layer. Typical deposition times used in the electroless method are from 10 min to 4 hours.
The greatest problem in the electroless process is to achieve the correct ratio of the active plating area to the volume of the aqueous solution of metal salt compounds in the plating system. For instance, to keep a typical nickel-salt-based plating process active requires that the ratio is above 0.25 dm.sup.2 /l (that is, 2500 mm.sup.2 /1,000,000 mm.sub.3), while on the other hand, the ratio must be kept smaller than 2.5 dm.sup.2 /l (that is, 25,000 mm.sup.2 /1,000,000 mm.sup.3) to avoid overactivation of the plating system, which leads to self-destruction. Typically, when the silicon wafer diameter is, e.g., 100 mm and its area, consequently, 0.785 dm.sup.2 (7850 mm.sup.2), the total bonding area be plated on it may be as small as 88 mm.sup.2, for instance. Hence, the liquid volume in the process should not vary by more than 3520-35200 mm.sup.3 per each wafer. In an ideal situation where the sectional area of the process vessel would be exactly equal to the wafer area, the thickness of the plating solution cushion facing the wafer should be kept in the range 0.45-4.5 mm.
A second requirement set for a well-behaved process is that a homogeneous mixing of the plating solution is maintained over the wafer area being processed. Thirdly, the plating process temperature should in a controlled way remain within a certain range in order to maintain the process in working condition and to control the deposition rate. Fourthly, continuous filtering of the plating solution during the process is advisable to remove any eventual precipitated metal nodules formed in the process through self-catalytic action.
It is an object of the present invention to achieve an entirely novel method and apparatus for electroless plating of bonding bumps on semiconductor wafers.
The invention is based on placing the semiconductor wafer on the surface of a piston-like element situated in the process vessel, whereby the volume entailed by the piston clearance and a circulation apparatus is dimensioned to correspond to the liquid volume required of the process. Movement of the piston achieves the required circulation of the plating solution.
More specifically, the method according to the invention is characterized by what is stated in the characterizing part of claim 1.
Furthermore, the apparatus according to the invention is characterized by what is stated in the characterizing part of claim 5.
The invention offers significant benefits.
The present method fulfills the liquid volume requirements set by the process. Moreover, the piston-like arrangement ensures sufficient liquid circulation and a side circulation offers the removal of precipitated metal nodules from the plating solution. The the small process vessel placed in a thermostatted water bath, can be used to accurately control the temperature of the process.
Compared to the electrochemical plating process, a significant number of process steps are eliminated. Obviated are such steps as the thin-film deposition, the

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patent: 4152467 (1979-05-01), Alpaugh et al.
patent: 4205099 (1980-05-01), Jones et al.
patent: 4262044 (1981-04-01), Kuczma, Jr.
patent: 4622917 (1986-11-01), Schramm
patent: 5077099 (1991-12-01), Kukanskis et al.
patent: 5198089 (1993-03-01), Brueggman

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