Method and apparatus for charged particle beam exposure

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Details

364489, 364491, 250398, 2504911, 2504922, H01J 37302

Patent

active

047899450

ABSTRACT:
A method and apparatus for drawing, by an electron beam, patterns on a semiconductor wafer for fabricating of an integrated circuit. Chip areas on the semiconductor wafer are each divided into rectangular blocks arrayed in rows and columns. The deflection field of the electron beam is selected slightly larger than each block. Real block marks, indicating the positions of respective blocks, are provided on every side of the chip area. The specimen is fed so that a block array starting at one corner of the chip area passes through the deflection field along one side of the array. Upon detecting the block marks at three corners of a first block of the array, correction coefficients for the block are computed based on the positions of the three detected real block marks and then an imaginary block mark is set at the remaining corner of the block on the basis of the correction coefficients. Thereafter, upon each detection of one real block mark for each block of the block array, correction coefficients are computed based on the position of the newly detected real block mark, the position of the real block mark detected for the immediately preceding block, and the position of the imaginary block mark set for the immediately preceding block. An imaginary block mark is set for the block on the basis of the correction coefficients. Pattern data for each block is corrected according to the correction coefficients thus obtained and a pattern is drawn in the block in accordance with the corrected pattern data.

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