Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation
Reexamination Certificate
2007-09-18
2007-09-18
Kinkead, Arnold (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Tuning compensation
C331S17700V, C332S127000, C332S128000, C455S260000
Reexamination Certificate
active
11232650
ABSTRACT:
A method and apparatus improves the stability and noise performance of frequency synthesis and synchronization circuits. A cancellation circuit provides an error signal that is a measure of integrated quantization error in a delta-sigma modulator that controls the ratiometric division factor in a fractional-N phase-lock loop (PLL). The error signal is fed to the loop filter of the phase-lock loop as a correction signal via a differentiator (high-pass filter). The high pass filter removes substantially all in-band components from the cancellation signal, which reduces the linearity requirement on the cancellation signal path. The cancellation signal can be tapped from an internal numerical integrator of the delta-sigma modulator that is then converted to an analog signal, that is then filtered and combined with the phase comparator output in the loop filter.
REFERENCES:
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patent: 5825253 (1998-10-01), Mathe et al.
Pamarti et al., “A wideband 2.4 GHz delta-sigma franctional-N PLL with a Mb/s in-loop modulation,” IEEE J. Solid-State Cir., 39(1):49-62, Jan. 2004.
Galton, I., “Fractional-N phase locked loops for frequency synthesis,” Silicon Labs Distinguished Seminar on Mixed Signal Design, Univ. of Texas at Austin, Mar. 25, 2003.
Galton, I., “Delta-sigma franctional-N phase-locked loops,” from Phase-Locking in High Performance Systems: From Devices to Architectures, Behzad Razavi, Wiley-IEEE Press, Feb. 2003, p. 23-33.
Cirrus Logic Inc.
Harris Andrew M.
Kinkead Arnold
Mitch Harris Atty at Law, LLC
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