Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2000-09-29
2004-08-10
Mai, Tan V. (Department: 2124)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
06775685
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates in general to digital voice communication systems, and more particularly to a method and apparatus for generating the mathematical square (i.e. energy) of a non-linear encoded signal.
BACKGROUND OF THE INVENTION
Digitized voice samples may be encoded into 8 bit values according to &mgr;-law or A-law compression formats as defined by ITU recommendation G.711. Since the encoding is not linear, in order to perform arithmetic operations (e.g. squaring) upon a voice sample, it must first be expanded to a 13 bit signed linear value.
Two basic approaches have been used in the prior art for generating the square of G.711 encoded data. According to a first approach, a look-up table is constructed with 256 values representing the squares of the respective encoded values, each value being 26 bits wide. The values in the look-up table are indexed by the encoded value. The table is divided into 128 values for A-law encoding and 128 values for &mgr;-law encoding. Since the output values represent the square of a signal sample, the sign bit can be ignored. The look-up table approach may be implemented in software with a CASE statement or in hardware employing a ROM.
The software look-up table approach, which requires a processor and memory resources, takes several clock cycles to generate the square. As a result, this look-up table approach suffers from the disadvantage that considerable computation time is required to locate and output the value from the look-up table. The hardware implementation of the look-up table approach is not always possible as not all integrated circuit technologies are capable of providing the necessary ROM circuitry such as many FPGA technologies and ASIC technologies without embedded core capabilities.
Another approach for generating the square of G.711 encoded data utilizes circuitry for converting the sample back to a linear value, and then performing an arithmetic squaring function on the linear value. This approach suffers from the disadvantage that the hardware circuitry is large, thereby occupying valuable circuit real estate.
It is therefore an object of the present invention to provide a novel apparatus and method for generating the square of a non-linear encoded signal.
SUMMARY OF THE INVENTION
According to the present invention, a method and apparatus are provided for performing a squaring operation in hardware on a non-linear encoded signal, without first linearizing the sample, thereby saving a considerable amount of circuitry and enhancing performance relative to the prior art.
More particularly, in one aspect of the present invention there is provided an apparatus for generating the square of a non-linear encoded signal including a value and a segment number, said apparatus comprising:
an offset generator receiving the value of said encoded signal and adding an offset value thereto thereby to generate a multiplicand;
a multiplier receiving said multiplicand and generating the square thereof; and
a shifter shifting said square in accordance with the segment number of said encoded signal thereby to generate the square of said encoded signal.
In a preferred embodiment, the encoded signal is A-law or &mgr;-law encoded. When the signal is A-law encoded, the offset value added to the value of the encoded signal is equal to zero. When the signal is &mgr;-law encoded, the offset value added to the value of the encoded signal is dependent on the segment number of the encoded signal.
According to another aspect of the present invention there is provided a method for generating the square of a non-linear encoded signal including a value and a segment number comprising the steps of:
adding an offset value to the value of said signal to generate a multiplicand;
squaring the multiplicand; and
shifting the square of the multiplicand in accordance with the segment number of said signal thereby to generate the square of said encoded signal.
According to yet another aspect of the present invention there is provided a method for generating the square of an A-law encoded signal including a value and a segment number comprising the steps of:
squaring the value of said encoded signal; and
shifting the square in accordance with the segment number thereby to generate the square of said encoded signal.
According to still yet another aspect of the present invention there is provided a method for generating the square of a &mgr;-law encoded signal including a value and a segment number comprising the steps of:
adding an offset value to the value of said signal dependent on the segment number to generate a multiplicand;
squaring the multiplicand; and
shifting the square of multiplicand in accordance with the segment number of said signal thereby to generate the square of said encoded signal.
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Beyer Weaver & Thomas LLP
Mai Tan V.
Zarlink Semiconductor Inc.
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