Method and apparatus for bulk preprogramming flash memory cells

Details Method and apparatus for bulk preprogramming flash memory cells Method and apparatus for bulk preprogramming flash memory cells

1997-09-26

1999-07-06

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518528, 36518529, 36518533, G11C 1604

Patent

active

059205067

ABSTRACT:
Apparatus is provided to facilitate the process of bulk preprogramming each of the cells in a flash memory or a subblock of a flash memory. In the process, the source and drain of each cell to be preprogrammed is biased such that current need not be flowing between the source and drain through the cell's channel region for charge to be transferred between the cell's channel region and the cell's floating gate. In a specific embodiment, the sources and drains are left floating without any particular bias voltage and the control gates of the cells are set to between 9 and 12 volts above the substrate and held there for about 10 milliseconds (ms). In an alternate embodiment, the sources and drains of all of the cells to be preprogrammed are biased to the same potential, which is a negative voltage, ground, or a positive voltage.

REFERENCES:
patent: 5491657 (1996-02-01), Haddad et al.
patent: 5583811 (1996-12-01), Van Houdt et al.
patent: 5708588 (1998-01-01), Haddad et al.
patent: 5726933 (1998-03-01), Lee et al.
Seiichi Artome, et al., "Reliability Issues of Flash Memory Cells," Proceedings of the IEEE, vol. 81, No. 5, (May 1993), pp. 776-787.
Paolo Pavan, et al.; "Flash Memory Cells--An Overview," Proceedings of the IEEE, vol. 85, No. 8, (Aug. 1997), pp. 1248-1271.

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