Method and apparatus for built-in self-test with multiple clock

Details Method and apparatus for built-in self-test with multiple clock Method and apparatus for built-in self-test with multiple clock

1995-10-20

1997-10-21

Heckler, Thomas M.

Excavating

371 225, 395556, G06F 1127

Patent

active

056805438

ABSTRACT:
Built-In Self-Testing of multiple scan chains (12.sub.1 -12.sub.n)can be accomplished by providing separate clock signals (CK.sub.1 -CK.sub.n) that are scheduled by a control circuit (22) so that each chain is clocked at its rated frequency.

REFERENCES:
patent: 5533032 (1996-07-01), Johnson
patent: 5570374 (1996-10-01), Yau et al.
patent: 5574733 (1996-11-01), Kim
Benoit Nadeau-Dostie, Dwayne Burek, Abu S.M. Hassan, "ScanBist: A Multifrequency Scan-Based BIST Method," IEEE Design & Test of Computers, Spring 1994, vol. 11, No. 1, pp. 7-17.
Chih-Jen Lin, Yervant Zorian, Sudipta Bhawmik, "PSBIST: A Partial Scan Based Built-In Self Test Scheme," Proc. of International Test Conference, Baltimore, MD, 1993.

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