Method and apparatus for buffer self-test and characterization

Details Method and apparatus for buffer self-test and characterization Method and apparatus for buffer self-test and characterization

1996-05-07

1997-04-15

Canney, Vincent P.

Excavating

371 225, G01R 3128

Patent

active

056217390

ABSTRACT:
A self-testing buffer circuit. The buffer circuit utilizes an adjustable delay circuit to test whether the buffer can capture a data value during a variable stroke window. The buffer includes an input circuit coupled to receive a data value generated by the self-testing buffer circuit. The buffer circuit also includes a latch which has a latch input coupled to receive the data value from the input circuit. An adjustable delay circuit having a delay adjust input is coupled to provide an adjustably delayed strobe to a clock input of the latch. A comparison circuit may be coupled to compare a latch output value to an expected value. The self-testing buffer circuit may be used in conjunction with serial or parallel test resisters to test the buffer performance for a variety of strobe delays and data values.

REFERENCES:
patent: 5381421 (1995-01-01), Dickol et al.
patent: 5400057 (1995-03-01), Yin

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