Electrical computers and digital processing systems: multicomput – Multicomputer data transferring via shared memory
Reexamination Certificate
1999-07-16
2002-07-16
Geckil, Mehmet B. (Department: 2152)
Electrical computers and digital processing systems: multicomput
Multicomputer data transferring via shared memory
C709S214000, C709S230000, C709S232000, C709S235000
Reexamination Certificate
active
06421712
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates in general to computer architecture and more particularly to a method and apparatus for broadcasting invalidation messages in a computer system.
BACKGROUND OF THE INVENTION
When a memory location is altered in a computer system, nodes and processors within that computer system that rely on and share the contents of that memory location must be informed that their version of the contents of the memory location have been altered and are no longer valid. An invalidation engine in a node of a computer system is used to process invalidation requests from a processor associated with the node that alters the shared memory by issuing an invalidation message to each affected node of the computer system indicated in the invalidation request. A single invalidation request may require a multitude of invalidation messages to be sent out the network port and across the interconnect to each affected node depending on the size of the computer system. The amount of effort and time required to broadcast a burst of invalidation requests and the invalidation messages associated therewith create several problems at the node. For example, the flood of invalidation messages from a node may monopolize its network port and cause other traffic to wait before being transferred or be potentially discarded altogether. Nodes may block the sending of invalidation requests to a busy invalidation engine for long periods of time, resulting in the tying up of the node's crossbar resources and preventing the ability to process further inputs. Therefore, it is desirable to avoid having invalidation requests clog up the operation of a computer system.
SUMMARY OF THE INVENTION
From the foregoing, it may be appreciated that a need has arisen for an invalidation engine technique that won't tie up computer system resources. In accordance with the present invention, a method and apparatus of broadcasting invalidation messages in a computer system are provided that substantially eliminate or reduce disadvantages and problems associated with conventional invalidation engine techniques.
According to an embodiment of the present invention, there is provided a node controller for broadcasting invalidation messages in a computer system that includes a memory directory unit for controlling access to data within a local memory device. A network interface unit is operable to provide data and control messages to and receive data and control messages from other node controllers in the computer system. A local buffer unit is operable to receive an invalidation request and generate a plurality of invalidation messages therefrom. A crossbar unit arbitrates the transfer of data and invalidation messages for the memory directory unit, the network interface, and the local buffer unit through an interleaving technique to prevent blocking of node controller operation during processing of invalidation requests.
REFERENCES:
patent: 5752264 (1998-05-01), Blake et al.
patent: 5887146 (1999-03-01), Baxter et al.
patent: 6339812 (2002-01-01), McCracken et al.
Baker & Botts L.L.P.
Geckil Mehmet B.
Silicon Graphics Inc.
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