Method and apparatus for bridging a plurality of buses and...

Details Method and apparatus for bridging a plurality of buses and... Method and apparatus for bridging a plurality of buses and...

1999-06-28

2001-06-26

Maung, Zarni (Department: 2152)

Electrical computers and digital processing systems: multicomput

Bused computer networking

C709S225000, C709S216000, C709S229000, C710S027000, C710S028000, C714S043000, C714S044000

Reexamination Certificate

active

06253250

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to buses generally and, more specifically, the present invention relates to communications between buses.
2. Background Information
A bus can sometimes be considered to be a collection of wires or other transmission media through which data is transmitted. One part of a computer may communicate with another part of the computer or another piece of equipment outside the computer through a bus. A bus bridge provides a connection path between two independent local buses. One function of a bus bridge is to allow transactions to occur or between a master on one bus and a target on the other.
To illustrate,
FIG. 1
shows a bus bridge
113
providing a connection path between bus
109
and bus
111
. As shown, bus
109
is part of a host system
101
and bus
111
is part of a peripheral system
103
. One example of bus
109
may be the Peripheral Component Integration (PCI) bus. In this example, host system
101
may be a personal computer and peripheral system
103
may be a peripheral coupled to the personal computer. The personal computer would be considered the master and would control peripheral system
103
. Host memory
105
of host system
101
is accessible by bus
109
and peripheral memory
107
of peripheral system
103
is accessible by bus
111
.
With the configuration illustrated in
FIG. 1
, host system
101
may communicate with peripheral system
103
through bridge
113
. Thus, data may be transmitted back and forth between bus
109
and bus
111
through bridge
113
. One characteristic of bridge
113
is that because it assumes that host system
101
is the master, bus exceptions, such as a bus reset
115
for example, are also transmitted through bridge
113
. Consequently, if bus
109
is reset through bus reset
115
, bus
111
is also reset. Activity on peripheral system
103
is reset and interrupted as a result of bus reset
115
from bus
109
.
SUMMARY OF THE INVENTION
A bus bridge coupled to transfer data between a first bus and a second bus is disclosed. In one embodiment, the bus bridge includes a first bus exception domain coupled to the first bus such that a bus exception event that occurs in the first bus is limited to the first bus exception domain. The disclosed bus bridge also includes a second bus exception domain coupled between the first bus exception domain and the second bus such that a bus exception event that occurs in the second bus is limited to the second bus exception domain. A first bus exception monitor is included in the first bus exception domain to monitor for a bus exception event that occurs in the second bus. A second bus exception monitor included in the second bus exception domain to monitor for a bus exception event that occurs in the first bus. Additional features and benefits of the present invention will become apparent from the detailed description, figures and claims set forth below.


REFERENCES:
patent: 4325120 (1982-04-01), Colley et al.
patent: 5732094 (1998-03-01), Petersen et al.
patent: 5815647 (1998-09-01), Buckland et al.
patent: 5884027 (1999-03-01), Garbus et al.
patent: 5978866 (1999-11-01), Nain
patent: 6108778 (2000-08-01), LaBerge

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