Data processing: software development – installation – and managem – Software program development tool – Testing or debugging
Reexamination Certificate
2000-02-14
2003-11-11
Nguyen-Ba, Hoang-Vu Antony (Department: 2122)
Data processing: software development, installation, and managem
Software program development tool
Testing or debugging
C714S030000, C714S046000, C714S038110, C712S227000
Reexamination Certificate
active
06647545
ABSTRACT:
BACKGROUND
1. Field
This disclosure relates to microprocessor debug features.
2. Background Information
One debug feature of processors, such as microprocessors, that may be used, for example, by software driver developers or basic input output system (BIOS) developers, tracks the sequential execution of machine instructions or code, as it is often referred to in the art. Software drivers and BIOS are both well-known in the art. This tracking of code execution may be accomplished by employing branch trace messages (BTMs). These branch trace messages may indicate when a branch is taken in code execution. There are numerous reasons for the use of branches in code. For example, decision points in code execution typically employ such branches. Whether or not a branch is taken may depend on the result of such a decision. Typically, BTMs include information about where in the code the branch was taken from and where in the code the branch resumes execution. Where the branch was taken from may be referred to as the branch address and where in the code the branch resumes execution may be referred to as the target address. Instruction pointers, which are well-known in the art, typically reference the location of an instruction that is currently being executed by a processor or microprocessor. Such BTM schemes are currently employed, for example, in microprocessors such as Pentium® II Processors and Pentium® III Processors, which are available from Intel Corporation, 2200 Mission College Blvd., Santa Clara, Calif. 95052. However, as microprocessors become highly integrated, debugging code, such as software drivers, becomes more problematic because, depending, at least, on the architecture, for example, prior approaches to tracking code execution may no longer apply. Therefore, a need exists for alternative schemes of debugging computing systems, such as is done by following code execution flow with BTMs, for example.
REFERENCES:
patent: 5636374 (1997-06-01), Rodgers et al.
patent: 5652856 (1997-07-01), Santeler et al.
patent: 5889981 (1999-03-01), Betker et al.
patent: 6073251 (2000-06-01), Jewett et al.
patent: 6145122 (2000-11-01), Miller et al.
patent: 6331957 (2001-12-01), Kurts et al.
“Pentium II Processor Developer's Manual—GTL+ Interface Specifications,” Intel Publication 243502-001, Chapter 8 plus title page, Oct. 1997, 22 pages.
“Intel Architecture Software Developer's Manual—vol. 1: Basic Architecture—Introduction to the Intel Architecture,” Intel Publication 243191, Ch. 2 plus title page, 1999, 14 pages.
“Intel Architecture Software Developer's Manual—vol. 3: System Programming: Debugging and Performance Monitoring,” Intel Publication 243192, Ch. 15 + title page, 1999, 21 pages.
Anati Ittai
Kurts Tsvika
Lempel Oded
Lustig Haim
Surgutchik Roman
Blakely , Sokoloff, Taylor & Zafman LLP
Nguyen-Ba Hoang-Vu Antony
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