Method and apparatus for batchable frame switch and synchronizat

Details Method and apparatus for batchable frame switch and synchronizat Method and apparatus for batchable frame switch and synchronizat

1996-05-16

1997-08-12

Tung, Kee M.

Computer graphics processing and selective visual display system

Display driving control circuitry

Controlling the condition of display elements

395508, 395522, 345201, G06F 1516

Patent

active

056574789

ABSTRACT:
A system and method that avoids performance bottlenecks at the host processor while avoiding tearing of the displayed image. In one embodiment, the system is composed of the host processor, a first in first out (FIFO) buffer, a co-processor, multiple frame buffers, a display controller and a display. The host and the co-processor are configured to enable the host to selectively batch graphic commands to the co-processor. The small set of commands provides the flexibility to selectively batch commands and selectively synchronize the host processor to the co-processor.

REFERENCES:
patent: 5299309 (1994-03-01), Kuo et al.
patent: 5519825 (1996-05-01), Naughton et al.
patent: 5543824 (1996-08-01), Priem et al.

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