Method and apparatus for arbitrating access to a microprocessor

Details Method and apparatus for arbitrating access to a microprocessor Method and apparatus for arbitrating access to a microprocessor

1992-04-08

1993-12-07

Kriess, Kevin A.

Boots, shoes, and leggings

364DIG1, 36424231, 3642329, 36424691, 36424221, 395500, G06F 1332

Patent

active

052690067

ABSTRACT:
A microprocessor access arbitration network which arbitrates among HOLD, RESET and REFRESH request commands by controlling a preempt bus so that a system memory refresh cycle is never delayed by a DMA or bus master operation is described. If a HOLD request is in progress for an operation other than a REFRESH cycle when a REFRESH cycle is initiated, that HOLD request is delayed while the REFRESH cycle proceeds to completion.

REFERENCES:
patent: 4779187 (1988-10-01), Letwin
patent: 4787032 (1988-11-01), Culley
patent: 4825358 (1989-04-01), Letwin
patent: 4891752 (1990-01-01), Fairman et al.
patent: 4987529 (1991-01-01), Craft et al.
patent: 5083259 (1992-01-01), Maresh et al.
patent: 5109521 (1992-04-01), Culley

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