Method and apparatus for arbitrating access to a high speed digi

Details Method and apparatus for arbitrating access to a high speed digi Method and apparatus for arbitrating access to a high speed digi

1992-03-11

1993-11-16

Chun, Debra A.

Boots, shoes, and leggings

364DIG1, 3642426, 36424292, 3642427, 3642401, G06F 13368

Patent

active

052631389

ABSTRACT:
An auxiliary busing arrangement for transferring real time data in a computer system including a plurality of conductors sufficient to transfer in parallel the bits of a data word and the control signals necessary to control the transfer; a plurality of components connected to utilize the busing arrangement, each of the components being assigned a unique priority number and being connected to one of the plurality of conductors used for one of the control signals; apparatus in each of the components for detecting the condition of the one of the plurality of conductors; apparatus for providing clock signals on another of the plurality of conductors used for one of the control signals; apparatus for providing a first condition on the one of the plurality of conductors; apparatus in each of the components for providing a second condition on the one of the plurality of conductors; apparatus in each of the components for terminating an attempt to access the busing arrangement in response to the detection of the second condition on the one of the plurality of conductors; and apparatus for providing the second condition on the one of the plurality of conductors for a number of clock periods equivalent to one more than the unique priority number assigned to the component and then releasing the one of the plurality of conductors for a clock period while detecting the condition of the one of the plurality of conductors.

REFERENCES:
patent: 4320467 (1982-03-01), Glass
patent: 4620278 (1986-10-01), Ellsworth et al.
patent: 4837682 (1989-06-01), Culler
patent: 4974148 (1990-11-01), Matteson
patent: 5060139 (1991-10-01), Theus

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