Method and apparatus for anticipatory selection of external or i

Details Method and apparatus for anticipatory selection of external or i Method and apparatus for anticipatory selection of external or i

1999-06-15

2000-09-05

Elms, Richard

Static information storage and retrieval

Addressing

Multiplexing

365233, 36523006, 36523008, 365193, G11C 800

Patent

active

061153141

ABSTRACT:
A method and apparatus are disclosed for selecting either an external column address or an internal column address in a synchronous memory device. The external or internal address is selected by decoding command signals applied to the memory device. If the command signals correspond to a read or a write memory access, an external column address is selected. If the command signals correspond to a burst read or write memory access, an internal column address is selected. Significantly, the command signals are decoded prior to the transition of a clock signal that initiates a memory access so that a column address decoder is already connected to the proper column address source prior to the start of a memory access.

REFERENCES:
patent: 4802135 (1989-01-01), Shinoda et al.
patent: 5598376 (1997-01-01), Merritt et al.
patent: 5668773 (1997-09-01), Zagar et al.
patent: 5923604 (1999-07-01), Wright et al.

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