Boots – shoes – and leggings
Patent
1984-05-22
1987-01-13
Eng, David Y.
Boots, shoes, and leggings
371 17, G06F 1130
Patent
active
046369414
ABSTRACT:
A method for analyzing the operation of a microprocessor connected to a system to be tested and a plurality of buses includes the following steps. From the information concerning bus signal states and instruction execution, only information for cases other than interrupt routine processes and subroutine processes is selected, and the selected information is stored into a memory device, and then an analysis of the operation of the microprocessor on the basis of the selected and stored information is carried out. Alternatively, from the information concerning bus signal states and instruction execution, only information for cases other than executions of a stack pointer changing instructions and interrupt response processes is selected, and the selected information is stored into a memory device, and then an analysis of operation of the microprocessor on the basis of the selected and stored information is carried out. Apparatuses for these methods are also disclosed.
REFERENCES:
patent: 3813531 (1974-05-01), King et al.
patent: 3937938 (1976-02-01), Matthews
patent: 3939453 (1976-02-01), Schroeder
patent: 4063221 (1977-12-01), Watson et al.
patent: 4498130 (1985-02-01), Uchida
J. Smith, "A Logic State Analyzer for Microprocessor Systems", Hewlett-Packard, 1977.
Tom Williams, "Logic Analyzers Rise to the Challenge of Microprocessors", Computer Design, Apr. 5, 1983, pp. 155-164.
Eng David Y.
Iwatsu Electric Co. Ltd.
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