Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2001-02-08
2003-05-20
JeanGlaude, Jean Bruner (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S143000
Reexamination Certificate
active
06567027
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to processing of data and more particularly to processing data by performing an analog to digital conversion with varying sample rates.
BACKGROUND OF THE INVENTION
Analog to digital converters are known to receive an analog signal and generate a corresponding digital signal. An analog to digital converter may be implemented using a variety of topologies. For example, an analog to digital converter may be implemented utilizing Sigma-Delta technology, mash converter technology, successive approximation technology, flash converter technology, or variations thereof. For example, a mash analog to digital converter is a variation of a Sigma-Delta modulator.
The order of an analog to digital converter, such as a Sigma-Delta analog to digital converter, varies depending on the application. For example, in audio applications, where the analog input signal range varies from 20 Hz to 20 Khz, a 2
nd
order Sigma-Delta modulator analog converter works well. As the bandwidth of the signal range increases, the order of the modulator must also increase. For example, to process signals with a bandwidth up to 400 Khz, a 4
th
order Sigma-Delta modulator, analog to digital converter is utilized.
FIG. 1
illustrates a schematic block diagram of a 4
th
order Sigma-Delta analog to digital converter
10
. The analog to digital converter
10
includes two 2
nd
order Sigma-Delta modulators
12
and
14
, a recombining filter
16
and a decimation filter
18
. The decimation filter includes a 5
th
order cascaded integrated comb (CIC) filter
20
and a finite impulse response (FIR) filter
22
. In operation, the 2
nd
order Sigma-Delta modulator
12
receives an analog input signal and samples it at a rate of N times the output sampling frequency (F
s
). For example, if the output sampling frequency (F
s
) is 700 Khz, the over sampling frequency of the Sigma-Delta modulator (N*F
s
) may be approximately 35 Mhz. 2
nd
order Sigma-Delta modulator
12
outputs a 1-bit data stream that is provided to the recombining filter
16
and produces an analog output that is provided to 2
nd
order Sigma-Delta modulator
14
. 2
nd
order Sigma-Delta modulator
14
samples the analog output and produces a corresponding 1-bit stream of digital data.
The recombining filter
16
combines the 2 digital streams of data to produce a multi-bit stream of data. The 5
th
order CIC filter
20
, operating at a rate of some multiple of the output sampling rate (M*F
s
), produces a digital filtered output. The FIR filter
22
further filters and down-samples the CIC filtered signal to produce the resulting digital output at the desired sampling rate (F
s
).
The 4
th
order Sigma-Delta A to D converter of
FIG. 1
works well when the output is a fixed frequency. For digital communication protocols, such as digital subscriber line (DSL), asymmetrical digital subscriber lines (ADSL), universal asymmetrical digital subscriber lines (UADSL), high-speed digital subscriber line (HDSL), and symmetrical high-speed digital subscriber lines (SHDSL), the digital output rate may vary by a magnitude of 10. For example, for an SHDSL application, the analog to digital converter outputs digital symbols that may vary in rate from approximately 70 KHz to approximately 700 KHz. In such an application, the crystal producing the over sampling clock and the clock for the decimation filter cannot be varied by a magnitude of 10.
Therefore, a need exists for a method and apparatus of sample rate conversion within analog to digital converters having a higher order modulator.
REFERENCES:
patent: 4851841 (1989-07-01), Sooch
patent: 5512895 (1996-04-01), Madden et al.
patent: 5748126 (1998-05-01), Ma et al.
patent: 6249549 (2001-06-01), Kim
“Delta-Sigma Data Converters—Therory, Design, and Simulation”, IEE Press Marketing, Edited by Steven R. Norsworthy, Richard Schreier and Gabor C. Temes, copyright 1997 by the Institute of Electrical and Electronics Engineers, Inc., New York, NY.
“A High-Frequency and High-Resolution Fourth-Order &Sgr;&Dgr;A/D Converter in BiCMOS Technolgy”, IEEE Journal of Solid-State Circuits, vol. 29, No. 8, Aug. 1994, By Guangming Yin, Student Member, IEEE, and Willy Sansen, Senior Member, IEEE.
JeanGlaude Jean Bruner
Markison Timothy W.
Sigmatel, Inc.
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