Method and apparatus for an improved optimizing compiler

Details Method and apparatus for an improved optimizing compiler Method and apparatus for an improved optimizing compiler

1995-03-31

1997-08-19

Oberley, Alvin E.

G06F 945

Patent

active

056597541

ABSTRACT:
An optimizing compiler process and apparatus is disclosed for more accurately and efficiently identifying live variable sets in a portion of a target computer program, so as to more efficiently allocate registers in a computer central processing unit. The process of the invention includes the steps of performing a static single assignment transform to a computer program, including the addition of phi functions to a control flow graph. Basic blocks representing a use of a variable are further added to the control flow graph between the phi functions and definitions of the variables converging at the phi functions. A backward dataflow analysis is then performed to identify the live variable sets. The variables in the argument of phi functions are not included as a use of those variables in this dataflow analysis. The dataflow analysis may be iteratively performed until the live variable sets remain constant between iterations. The apparatus of the present invention includes a computer system having a memory storing a set of variables that are live during the execution of a portion of a computer program. This memory may include CPU registers, cache memory, conventional RAM and other types of memory.

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Thesis entitled "Register Allocation via Graph Coloring", by Preston Briggs, Rice University, Houston, Texas, Apr. 1992, Title p.-143.

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