Method and apparatus for aligning the position of die on a wafer

Details Method and apparatus for aligning the position of die on a wafer Method and apparatus for aligning the position of die on a wafer

1996-06-20

1998-12-22

Bowers, Charles

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Substrate dicing

438 14, 438 16, H01L 2166

Patent

active

058518487

ABSTRACT:
A method for determining the position of a die on a wafer table after a wafer (20) has been cut includes stepping the wafer table (22) a series of one die lengths diagonally and after each step compare the die pattern to a reference die to determine street widths between dies. The widths are then averaged. This averaged street width is added to the die length to at the computer (26) to determine the jump distance between good dies. The distance from the reference die is continuously updated and this is used with the average street width to compute the next die position to jump. If the jump to the next die is unsuccessful, jump back to mid-point and if that is unsuccessful, reiterate mid-point jumps until successful.

REFERENCES:
patent: 5483056 (1996-01-01), Imai
patent: 5642307 (1997-06-01), Jernigan
patent: 5665609 (1997-09-01), Mori
patent: 5699260 (1995-03-01), Lucas et al.

Affiliated with

Also associated with

Rating

Method and apparatus for aligning the position of die on a wafer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for aligning the position of die on a wafer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for aligning the position of die on a wafer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2046469