Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2010-10-21
2011-12-13
Kindred, Alford (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S225000
Reexamination Certificate
active
08078831
ABSTRACT:
Apparatus, system and methods are provided for performing speculative data prefetching in a chip multiprocessor (CMP). Data is prefetched by a helper thread that runs on one core of the CMP while a main program runs concurrently on another core of the CMP. Data prefetched by the helper thread is provided to the helper core. For one embodiment, the data prefetched by the helper thread is pushed to the main core. It may or may not be provided to the helper core as well. A push of prefetched data to the main core may occur during a broadcast of the data to all cores of an affinity group. For at least one other embodiment, the data prefetched by a helper thread is provided, upon request from the main core, to the main core from the helper core's local cache.
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Brown Jeffery A.
Chrysos George Z.
Hammarlund Per
Liao Steve Shih-wei
Orenstein Doron
Intel Corporation
Kindred Alford
McAbee David P.
Moll Jesse
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