Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source
Reexamination Certificate
1998-03-23
2002-11-05
Saras, Steven (Department: 2675)
Computer graphics processing and selective visual display system
Display driving control circuitry
Display power source
C713S322000
Reexamination Certificate
active
06476800
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The invention relates generally to image display systems, and, more particularly, to controlling the refresh rate of image display systems.
2. Description of the Related Art
In order to control the display of image frames on a display device, image display systems typically rely on three video timing signals:
1) a pixel clock that represents transitions between pixels that make up an image frame;
2) a horizontal synchronization (HSYNCH) signal that represents transitions between lines of pixels that make up the image frame; and
3) a vertical synchronization (VSYNCH) signal that represents transitions between image frames.
The HSYNCH and VSYNCH signals are typically derived by dividing down the pixel clock signal by predetermined factors. For example, the HSYNCH signal may be derived by dividing down the pixel clock signal by the number of pixels that make up a scan line on the display device, and the VSYNCH signal may be derived by dividing down the HSYNCH signal by the number of lines that make up an image frame on the display device.
The refresh rate of an image display system represents the frequency with which an image frame is re-drawn by the display device of the system. The refresh rate of the system is typically controlled by varying the frequency of the pixel clock signal.
Current computer systems provide the capability of controlling the refresh rate of the display controller hardware through display setup utilities. Typically, data that defines a set of predetermined modes of operation of the display controller hardware is stored in the video/display BIOS of the computer system. During system setup, data defining an active mode is selected and written to the display controller hardware.
In general, when power consumption is not an issue, the highest possible refresh rate for given display controller hardware is preferable. In typical systems today, the highest possible refresh rate for a given display controller is in the range from 60 Hz to 85 Hz.
Higher refresh rates are preferable over lower refresh rates because, if the refresh rate is too slow, moving or animated images appear to jump from frame to frame instead of moving in a continuous motion.
For many applications, like word processing, spread sheets, etc. little motion or animation is involved. The screen may only need to be updated each time a character is entered by the user. In this scenario, the only noticeable difference if the refresh rate is lowered is that the mouse pointer motion will appear slow to respond.
SUMMARY OF THE INVENTION
The present invention provides for a software routine executable by the image display system that controls at least one video timing signal (for example, the pixel clock signal) supplied to the display subsystem. More specifically, the software routine, adjusts the video timing signal in response to detection that the image display system is switching between power modes. The software routine preferably updates the video timing signal such that the image display system conserves power in response to detection that the image display system is switching from AC-powered operation to limited DC-powered operation.
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Millman Steven Edward
Warren Kevin Wilson
Bell Paul A.
International Business Machines - Corporation
McGinn & Gibb PLLC
Saras Steven
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