Measuring and testing – Instrument proving or calibrating – Timing apparatus
Patent
1996-03-15
1999-04-13
Noland, Thomas P.
Measuring and testing
Instrument proving or calibrating
Timing apparatus
324617, 324765, 327270, G01R 3126, H03K 513
Patent
active
058940812
ABSTRACT:
Integrated circuits must fulfill published timing specifications that have been given to customers. To fulfill published timing specifications, such as minimum valid time and maximum valid time, a circuit for adjusting the output signals from an integrated circuit is introduced. The circuit comprises in part a speed detector circuit that determines the speed of a clock signal. The speed detector circuit outputs a speed signal that defines how fast the integrated circuit is operating. The speed signal is passed to a speed adjustment circuit. The speed adjustment circuit delays, as appropriate, output signals from the integrated circuit. The output signals are delayed such that output signals fulfill the timing, specifications published in the data book for this integrated circuit. The speed adjustment circuit delays output signals by adding buffers along the data path which add propagation delay to the output data path. A similar circuit is disclosed wherein input data is delayed such that set-up time and hold time specifications are met.
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Intel Corporation
Noland Thomas P.
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