Electrical computers and digital processing systems: processing – Processing architecture – Vector processor
Reexamination Certificate
2006-08-29
2006-08-29
Kim, Hong (Department: 2185)
Electrical computers and digital processing systems: processing
Processing architecture
Vector processor
C712S006000, C711S213000, C711S217000, C711S219000, C711S220000
Reexamination Certificate
active
07100019
ABSTRACT:
A system and method for calculating memory addresses in a partitioned memory in a processing system having a processing unit, input and output units, a program sequencer and an external interface. An address calculator includes a set of storage elements, such as registers, and an arithmetic unit for calculating a memory address of a vector element dependent upon values stored in the storage elements and the address of a previous vector element. The storage elements hold STRIDE, SKIP and SPAN values and optionally a TYPE value, relating to the spacing between elements in the same partition, the spacing between elements in the consecutive partitions, the number of elements in a partition and the size of a vector element, respectively.
REFERENCES:
patent: 3718912 (1973-02-01), Hasbrouck et al.
patent: 4128880 (1978-12-01), Cray, Jr.
patent: 4744043 (1988-05-01), Kloker
patent: 4760545 (1988-07-01), Inagami et al.
patent: 4807183 (1989-02-01), Kung et al.
patent: 4825361 (1989-04-01), Omoda et al.
patent: 4918600 (1990-04-01), Harper, III et al.
patent: 5206822 (1993-04-01), Taylor
patent: 5317734 (1994-05-01), Gupta
patent: 5367494 (1994-11-01), Shebanow et al.
patent: 5390352 (1995-02-01), Kinoshita
patent: 5418953 (1995-05-01), Hunt et al.
patent: 5423040 (1995-06-01), Epstein et al.
patent: 5450607 (1995-09-01), Kowalczyk et al.
patent: 5459807 (1995-10-01), Tamada
patent: 5652909 (1997-07-01), Kodosky
patent: 5697788 (1997-12-01), Ohta
patent: 5717947 (1998-02-01), Gallup et al.
patent: 5719998 (1998-02-01), Ku et al.
patent: 5734863 (1998-03-01), Kodosky et al.
patent: 5742821 (1998-04-01), Prasanna
patent: 5764787 (1998-06-01), Nickerson
patent: 5790877 (1998-08-01), Nishiyama et al.
patent: 5805614 (1998-09-01), Norris
patent: 5821934 (1998-10-01), Kodosky et al.
patent: 5826080 (1998-10-01), Dworzecki
patent: 5881257 (1999-03-01), Glass et al.
patent: 5881263 (1999-03-01), York et al.
patent: 5887183 (1999-03-01), Agarwal et al.
patent: 5893143 (1999-04-01), Tanaka et al.
patent: 5936953 (1999-08-01), Simmons
patent: 5966528 (1999-10-01), Wilkinson et al.
patent: 5969975 (1999-10-01), Glass et al.
patent: 5999736 (1999-12-01), Gupta et al.
patent: 6052766 (2000-04-01), Betker et al.
patent: 6064819 (2000-05-01), Franssen et al.
patent: 6104962 (2000-08-01), Sastry
patent: 6112023 (2000-08-01), Dave et al.
patent: 6128775 (2000-10-01), Chow et al.
patent: 6173389 (2001-01-01), Pechanek et al.
patent: 6192384 (2001-02-01), Dally et al.
patent: 6202130 (2001-03-01), Scales et al.
patent: 6253372 (2001-06-01), Komatsu et al.
patent: 6370560 (2002-04-01), Robertazzi et al.
patent: 6381687 (2002-04-01), Sandstrom et al.
patent: 6430671 (2002-08-01), Smith
patent: 6437804 (2002-08-01), Ibe et al.
patent: 6442701 (2002-08-01), Hurd
patent: 6490612 (2002-12-01), Jones et al.
patent: 6513107 (2003-01-01), Ansari
patent: 6571016 (2003-05-01), Mehrotra et al.
patent: 6588009 (2003-07-01), Guffens et al.
patent: 6598221 (2003-07-01), Pegatoquet et al.
patent: 6629123 (2003-09-01), Hunt
patent: 6647546 (2003-11-01), Hinker et al.
patent: 6665749 (2003-12-01), Ansari
patent: 6732354 (2004-05-01), Ebeling et al.
patent: 6745160 (2004-06-01), Ashar et al.
patent: 6792445 (2004-09-01), Jones et al.
patent: 6795908 (2004-09-01), Lee et al.
patent: 6898691 (2005-05-01), Blomgren et al.
patent: 7000232 (2006-02-01), Jones et al.
patent: 7010788 (2006-03-01), Rehg et al.
patent: 2002/0080795 (2002-06-01), Van Wageningen et al.
patent: 2002/0112228 (2002-08-01), Granston et al.
patent: 2002/0120923 (2002-08-01), Granston et al.
patent: 2003/0128712 (2003-07-01), Moriwaki et al.
patent: 2004/0003206 (2004-01-01), May et al.
patent: 2005/0053012 (2005-03-01), Moyer
patent: 2005/0055534 (2005-03-01), Moyer
patent: 2005/0055543 (2005-03-01), Moyer
Wulf, William A. “Evaluation of the WM Architecture.” Proceedings of the 19thAnnual International Symposium on Computer Architecture: 1992, pp. 382-390, ACM 0-89791-509-7/92/0005/0382.
Talla, Deependra; “Architectural Techniques to Accelerate Multimedia Applications on General-Purpose Processors”; University of Texas Doctoral Disertation: Aug. 2001; pp. 94-125 (Chapters 6 and 7); University of Texas, Austin, Texas.
Talla, Deependra; “Bottlemecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements”; IEEE Transactions of Computers; Aug. 2003; pp. 1015-1031; vol. 62, No. 8; IEEE.
Lam, M., Software Pipelining: An Effective Scheduling Technique for VLIW Machines, Proceedings of the SIGPLAN '88 Conference on Programming Language Design and Implementation, Atlanta, Georgia, Jun. 22-24, 1988, pp. 318-328.
Lee, T. et al., A Transformation-Based Method for Loop Folding, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 13, No. 4, Apr. 1994, pp. 439-450.
Kavi, K.M. et al., A Formal Definition of Data Flow Graph Models, IEEE Transactions on Computers, vol. C-35, No. 11, Nov. 1986, pp. 940-948.
Cooper, K.D. et al., Efficient Computation of Flow Insensitive Interprocedural Summary Information, SIGPLAN Notices, vol. 19, No. 6, Jun. 1984, pp. 247-258.
Strong, H.R., Vector Execution of Flow Graphs, Journal of the Association of Computing Machinery, vol. 39, No. 1, Jan. 1983, pp. 186-196.
Aiken, A. et al., Resource-Constrained Software Pipelining, IEEE Transactions on Parallel and Distributed Systems, vol. 6, No. 12, Dec. 1995, pp. 1248-1270.
Essick, IV Raymond B.
Lucas Brian G.
May Philip E.
Moat Kent D.
Norris James M.
Kim Hong
Motorola Inc.
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