Boots – shoes – and leggings
Patent
1988-12-05
1990-09-25
Clark, David L.
Boots, shoes, and leggings
364725, 36523003, G06F 1206
Patent
active
049597760
ABSTRACT:
A memory having an address generator in an intelligent port which generates address sequences specified by an array transformation operator in a programmable processor, thereby allowing a controlling processor to proceed immediately to the preparation of the next instruction in parallel with memory execution of a present instruction. The intelligent port of the memory creates complex data structures from input data arrays stored in memory and directs the transformation of the data structures into output data streams. The memory comprises a plurality of read-write memory banks and a bank of read-only memory interconnected through intelligent ports and busses to other units of the processor. An arbitration and switching network assigns memory banks to the intelligent ports.
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Deerfield Alan J.
Siu Sun-Chi
Clark David L.
Dawson Walter F.
Raytheon Company
Sharkansky Richard M.
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