Method and apparatus for ADC size and performance optimization

Details Method and apparatus for ADC size and performance optimization Method and apparatus for ADC size and performance optimization

2006-03-10

2009-06-16

Nguyen, Linh V (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S155000, C341S118000

Reexamination Certificate

active

07548178

ABSTRACT:
A sigma delta analog-to-digital converter (ADC) to convert an analog converter input signal to a digital converter output signal. Multiple integrator stages, including at least a first and a final one, each receive an analog input signal and an analog feedback signal and output an integrated signal. The integrator stages are serially ordered to receive the converter input signal and then preceding of the integrated signals. A quantizer receives the integrated signal of the final or multiple integrator stages and provides the converter output signal. A feedback system also receives the converter output signal and provides the respective analog feedback signals to at least one of the integrator stages. The feedback system particularly includes resisters arrayed so that at least one is in the paths of all of the analog feedback signals and others are only in the paths of each individual analog feedback signal.

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