Method and apparatus for adapting memory resource...

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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Reexamination Certificate

active

06633608

ABSTRACT:

The invention relates to communications systems generally and, more particularly, the invention relates to a method and apparatus for increasing memory utilization in an information stream decoder, such as an MPEG-like video decoder.
BACKGROUND OF THE DISCLOSURE
In several communications systems the data to be transmitted is compressed so that the available bandwidth is used more efficiently. For example, the Moving Pictures Experts Group (MPEG) has promulgated several standards relating to digital data delivery systems. The first, known as MPEG-1 refers to ISO/ICE standards 11172 and is incorporated herein by reference. The second, known as MPEG-2, refers to ISO/ICE standards 13818 and is incorporated herein by reference. A compressed digital video system is described in the Advanced Television Systems Committee (ACTS) digital television standard document A/53, and is incorporated herein by reference.
The above-referenced standards describe data processing and manipulation techniques that are well suited to the compression and delivery of video, audio and other information using fixed or variable length digital communications systems. In particular, the above-referenced standards, and other “MPEG-like” standards and techniques, compress, illustratively, video information using intra-frame coding techniques (such as run-length coding, Hoffman coding and the like) and inter-frame coding techniques (such as forward and backward predictive coding, motion compensation and the like). Specifically, in the case of video processing systems, MPEG and MPEG-like video processing systems are characterized by prediction-based compression encoding of video frames with or without intra- and/or inter-frame motion compensation encoding.
In a typical MPEG decoder, predictive coded pixel blocks (i.e., blocks that comprise one or more motion vectors and a residual error component) are decoded with respect to a reference frame (i.e., an anchor frame). The anchor frame is stored in an anchor frame memory within the decoder, typically a dual frame memory. As each block of an anchor frame is decoded, the decoded block is coupled to a first portion of the dual frame memory. When an entire anchor frame has been decoded, the decoded blocks stored in the first portion of the dual frame memory are coupled to a second portion of the dual frame memory. Thus, the second portion of the dual frame memory is used to store the most recent full anchor frame, which is in turn used by a motion compensation portion of the decoder as the reference frame for decoding predictive coded blocks.
Unfortunately, the cost of the memory necessary to implement an anchor frame memory may be quite high, in terms of money and in terms of integrated circuit die size (which impacts circuit complexity, reliability, power usage and heat dissipation). Moreover, as the resolution of a decoded image increases, the size of the required memory increases accordingly.
To reduce memory requirements in applications where image resolution is not critical (e.g., a small or relatively low resolution display device), it is known to compress image information prior to anchor frame storage, and decompress image information retrieved from anchor frame storage. However, since high quality systems demand high quality image information, such image degradation is not acceptable. Additionally, such high quality systems also tend to include other memory-consuming functions, such as picture in picture (PIP) or graphics-based channel navigation functions, thereby exacerbating the memory cost and bandwidth problem.
Therefore, it is seen to be desirable to provide a method and apparatus that significantly reduces the memory and memory bandwidth required to decode a video image while substantially retaining the quality of a resulting full-resolution or down sized video image and accommodating navigation and other memory-consuming functions.
SUMMARY OF THE INVENTION
The invention comprises a method and apparatus for reducing memory and memory bandwidth requirements in an MPEG-like decoder. Memory and memory bandwidth requirements are reduced by compressing image information prior to storage, and decompressing the stored (compressed) image information prior to utilizing the image information in, e.g., a motion compensation module of the decoder. Additionally, memory requirements are reduced by allocating, according to a mode of operation, available memory between a plurality of functions. In this manner, the amount of memory required to implement the decoder functions and other functions may be kept to a minimum.
In a first mode of operation, memory is preferentially allocated to an anchor frame storage function. In a second mode of operation, some of the anchor frame memory is re-allocated to another function. The reduction image quality cause by the reduction in anchor frame memory is somewhat offset by a frequency domain CODE used in conjunction with the anchor frame memory in the second mode of operation.
Specifically, in a system for decoding an MPEG-like information stream including compressed image information, a method according to the invention for adapting memory usage comprising the steps of: allocating, in a first mode of operation, a first level of available memory resources for storing relatively high resolution anchor frame information; allocating, in a second mode of operation, a second level of available memory resources for storing relatively low resolution anchor frame information, the first level of available memory resources being larger than the second level of available memory resources; and allocating, in the second mode of operation, a third level of available memory resources to a processing task, the third level of available memory resources comprising a resource level allocation difference between the first and second level of available memory resources.


REFERENCES:
patent: 5210534 (1993-05-01), Janex
patent: 6075906 (2000-06-01), Fenwick et al.
patent: 6310919 (2001-10-01), Florencio
patent: 6367079 (2002-04-01), De Vos et al.
patent: 2001/0019336 (2001-09-01), Gordon et al.

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