Method and apparatus for active power factor correction with...

Electric power conversion systems – Current conversion – With condition responsive means to control the output...

Reexamination Certificate

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C323S207000

Reexamination Certificate

active

06728121

ABSTRACT:

FIELD AND BACKGROUND OF THE INVENTION
The present invention relates to control method and apparatus of modular design for regulating the harmonics contents of the current drawn from the power line by electrical equipment and loads, and in particular to the electronic circuit design, physical construction and layout of such an apparatus.
Switch Mode and Resonant Converters are widely used for DC-DC, DC-AC, AC-DC and AC-AC conversion. In some groups of applications, the purpose of the power conversion scheme is to shape the input current seen at the input of the converter. For example, in an input power stage known in the art as an Active Power Factor Correction (APFC) circuit, the function of the converter is to ensure that the AC current seen by the power line is in phase with the line voltage with minimum high order harmonics. A typical well-known embodiment of APFC is shown in FIG.
1
. In this method, the input voltage is rectified by a diode bridge D′
1
and fed to a Boost stage that comprises an input inductor L′
in
, a power switch S′
1
, a high frequency rectifier D′
2
, an output filter capacitor C′
O
and a load R′
L
. Power switch S′
1
is driven by a high frequency control signal of duty cycle D
ON
such as to force an input current i
ina
to follow the shape of a rectified input voltage v
inR
. Consequently, the input terminal will look resistive i.e. the Power Factor (PF) will be unity.
The need for APFC stages is driven by the worldwide concern for the quality of the power line supplies. Injection of high harmonics into the power line and poor power factor in general, is known to cause many problems. Among these are the lower efficiency of power transmission, possible interference to other units connected to the power line, and distortion of the line voltage shape that is undesirable. In the light of the practical importance of APFC many countries have adopted, or are in the process of adopting, voluntary and mandatory standard. These norms set limits to the permissible current line harmonics injected by any given equipment that is powered by the mains so as to maintain a high power-quality [International Electrotechnical Commission (IEC), “International Standard 1000-3-2,” pp. 1-47, 1995].
Another advantage of APFC is the increase in the power level than can be drawn from a given power line. Without Power Factor Correction, the rms current will be higher than the magnitude of the first harmonics of the current, the latter being the only component that contributes to real load power. However, protection elements such as fuses and circuit breakers respond to the rms current. Consequently, the rms current will limit the maximum power that can be drawn from the line. In Power Factor Corrected equipment the rms current equals the magnitude of the first harmonics of the current (since the higher harmonics are absent) and hence the power drawn from the line could reach the maximum theoretical value. It is thus evident that the need for APFC circuits is wide spread, and that the economics of the realization is of prime importance. Cost is of great concern considering the fact that the APFC is an add-on expense to the functionality of the original equipment in which the APFC stage is included. In the light of the above, physical construction methods of APFC that are economical to produce and can be easily integrate in any given equipment are highly desirable and advantageous.
FIG. 2
illustrates the conventional embodiment of a APFC system [R. Mamano, “New developments in high power factor circuit topologies,”
HPFC Record, pp.
63-74, 1996.]. An APF CONTROLLER receives the shape of a rectified power line voltage V
ac

ref
obtained via a divider
110
comprised of resistors R′
a
and R′
b
from an input voltage V
inR
, which shape is used as the reference for the desired shape of the input current. The controller also receives a voltage v
iin
across a resistor R′
s
, the voltage V
iin
being identical to the input current when the power switch is on, and generates gate pulses D
ON
to a power switch Q′
1
such as to force the inductor current to follow the reference. The current level is adjusted for any given load R′
L
by monitoring output voltage V
O
via a divider
120
comprised of resistors R′
1
and R′
2
, and by multiplying the reference signal V
ac

ref
by the deviation from the desired output voltage level, so as to trim the effective reference signal to the load.
A major drawback of the prior art implementation of the APFC is the need for sensing the input voltage V
inR
, namely the line voltage after rectification. Due to the switching effects, the input voltage is normally noisy and is susceptible to interference pick-up that may distort the reference signal and hence the input current. Furthermore, the extra pin required for input voltage sensing will increase the number of pins of a modular device built in the conventional APFC scheme.
PFC controllers that do not require the sensing of the input voltage have been described in the past. (S. Ben Yaakov and I. Zeltser, “PWM Converters with Resistive Input”, IEEE Trans. Industrial Electr., Vol. 45 (3), pp. 519-520, 1998; S. Ben Yaakov and I. Zeltser, “PWM Converters with Resistive Input”,PCIM-98, pp. 87-95, Nuremberg, 1998; U.S. Pat. No. 5,742,151 to Hwang; and U.S. Pat. No. 6,034,513 to Ferrington). However, prior art methods that do not sense the input voltage suffer from a number of drawbacks that deteriorate their performance, in particular resulting in a higher Total Harmonic Distortion (THD). Furthermore, these prior art methods do not include means to ensure soft switching of the main switch. This deficiency is a major drawback in high power applications, where the reverse recovery current of the main diode may cause substantial power losses and high stresses on the main diode and switch. These drawbacks are next discussed in connection with the circuit described in S. Ben Yaakov and I. Zeltser, PCIM-98, but they apply in whole or part to other prior art embodiments of APFC systems that do not employ input voltage sensing.
The operation of the controller described in S. Ben Yaakov and I. Zeltzer, PCIM-98, hinges on some basic theoretical considerations to be detailed first. Consider the Boost stage of FIG.
1
. The voltage seen at point ‘a’ is a pulsating voltage of maximum amplitude V
o
and duration of t
off
(when S′
1
is not conducting). Consequently, the average voltage v
av
at point ‘a’ will be:
v
av
=
V
o

t
off
t
S
(
1
)
where t
S
is the PWM switching period.
Or:
v
av
=V
o
D
OFF
  (2)
where
D
OFF
=
t
off
t
s
(
3
)
The ‘on’ duty cycle D
ON
, when S′
1
is conducting (During t
on
) is similarly defined as:
D
ON
=
t
on
t
s
(
4
)
The input voltage fed to the Boost converter, is assumed to be of low frequency as compared to the switching frequency (f
S
=1/t
S
) and hence can be considered constant over one or several switching periods (t
S
). Assuming that the power stage is properly controlled, the average low frequency voltage across L′
in
, will be close to zero (otherwise the current will increase to very high values). This implies:
v
inR
=v
av
  (5)
or from (1)
v
inR
=V
o
D
OFF
  (6)
If D
OFF
is programmed according to the rule:
D
OFF
=Ki
ina
  (7)
where K is a constant and i
ina
is the low frequency component of the input current (i
in
), then:
v
inR
=V
o
Ki
ina
  (8)
or:
i
ina
=
v
inR
V
o

K
(
9
)
Assuming now that C′
O
is sufficiently large so that the ripple of V
o
can be neglected one sees that, according to eq. (8), the input current will follow the input voltage. That is, the converter stage will look resistive with an apparent input resistance R
e
:
R
e
=KV
o
  (10)
The value of the input resistance and hence the input current can thus be controlled by varying K. In practical applications, V
o
needs to be maintained constan

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