Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system
Reexamination Certificate
2001-09-27
2004-08-31
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Measurement system in a specific environment
Electrical signal parameter measurement system
C702S067000, C702S070000, C702S071000
Reexamination Certificate
active
06785621
ABSTRACT:
FIELD OF THE INVENTION
The field of invention relates to the measurement of signal waveforms, generally; and, more specifically, to a method and apparatus for accurately determining the crossing point within a logic transition of a differential signal.
BACKGROUND
FIG. 1
a
shows an embodiment of a differential signal. A differential signal typically has two signal components. A first signal
102
a
(usually referred to as the “positive” or “+” signal) is indicative of the logical information being transported by the differential signal. A second signal
103
a
(usually referred to as the “negative” or “−” signal) is indicative of the inverse of the logical information being transported by the differential signal.
For example, note that the differential signal observed in
FIG. 1
a
shows a 10101010 data pattern. As such, the + signal
102
a
is logical “high” for each “1” in the data pattern and a logical “low” for each “0” in the data pattern (noting that a logical high voltage is larger than a logical low voltage). Inversely, the − signal
103
a
is a logical “low” for each “1” in the data pattern and a logical “high” for each “0” in the data pattern.
Note that the 10101010 data pattern of
FIG. 1
a
corresponds to a series of alternating logical values. That is, the logical values of the data pattern repeatedly change from a “0” to a “1” and from a “1” to a “0”. Each logical change (which may also be referred to as a logical transition) within
FIG. 1
a
is approximately marked by a vertical line (e.g., noting that a first logical transition is approximately marked by the vertical line positioned at time T
1
).
FIG. 1
b
is a depiction of a “zoom in” of the first logical transition within
FIG. 1
a
(which, as alluded to just above, is approximately positioned at time T
1
and corresponds to a transition within the data pattern from a “1” to a “0”). Note that the logical high voltage is marked as V
OH
and the logical low voltage is marked as V
OL
. As such a logical transition from a “1” to a “0”, as seen in
FIG. 1
b
, typically involves the transitioning of the + signal waveform
102
b
from V
OH
to V
OL
and the — signal waveform
103
b
from V
OL
to V
OH
(correspondingly, not shown in
FIG. 1
b
, a logical transition from a “0” to a “1” typically involves the transitioning of the + signal waveform from V
OL
to V
OH
and the − signal waveform from V
OH
to V
OL
).
A characteristic of a logical transition within a differential signal is the “crossing point” of the logical transition. A crossing point
104
, as seen in
FIG. 1
b
, corresponds to the voltage where the transitioning + signal waveform
102
b
and the transitioning − signal waveform
103
b
“meet”. That is, if the + signal
102
b
waveform and the − signal
103
b
waveform are overlayed upon another (e.g., with an oscilloscope that samples and displays both waveforms simultaneously) they eventually meet (or cross one another) at the crossing point
104
.
FIG. 1
b
shows an embodiment of an ideally symmetrical logical transition. Indicia of an ideally symmetrical logical transition may include equal rates as between the fall rate of the + signal waveform
102
b
and the rise rate of the − signal waveform
103
b
; and, the + signal waveform
102
b
begins to fall at the same time the − signal waveform
103
b
begins to rise. As a result of these characteristics, the crossing point
104
is positioned approximately midway between V
OH
and V
OL
. That is, voltage
105
is the same as voltage
106
. Many if not most logical transitions, however, deviate from the ideally symmetrical logical transition observed in
FIG. 1
b.
FIG. 2
shows a plurality of crossing points
204
a
,
204
b
,
204
c
that result from the logical transition from a “1” to a “0” for various pairs of + signal waveforms
202
a
,
202
b
, and
202
c
and − signal waveforms
203
a
,
203
b
,
203
c
. Specifically: crossing point
204
a
results from a “1” to “0” logical transition that comprises + signal waveform
202
a
and − signal waveform
203
a
; crossing point
204
b
results from a “1” to “0” logical transition that comprises + signal waveform
202
b
and − signal waveform
203
b
; and crossing point
204
c
results from a “1” to “0” logical transition that comprises + signal waveform
202
c
and − signal waveform
203
c.
Crossing point
204
b
and +/− signal waveform pairs
202
b
,
203
b
correspond approximately to the ideally symmetrical logical transition discussed above with respect to
FIG. 1
b
. Crossing points
204
a
and
204
c
, however, result from +/− signal pairs that deviate from an ideally symmetrical relationship. That is, + signal waveform
202
a
begins to fall significantly after − signal waveform
203
a
begins to rise, resulting in a crossing point
204
a
that is above crossing point
204
b
. Similarly, + signal waveform
202
c
begins to fall significantly before − signal waveform
203
c
begins to rise, resulting in a crossing point
204
c
that is below crossing point
204
b.
In light of the fact that many if not most logical transitions deviate from an ideally symmetrical logical transition, it is not uncommon for a differential signal to demonstrate a spread of crossing point positions over time. That is, if a plurality of logical transitions from the same differential signal are overlayed upon one another (as observed in FIG.
2
), a plurality of different crossing points
204
a
,
204
b
,
204
c
are likely to be observed.
REFERENCES:
patent: 4006413 (1977-02-01), Silberberg
patent: 6377640 (2002-04-01), Trans
patent: 2002/0116196 (2002-08-01), Tran
patent: 2003/0016770 (2003-01-01), Trans et al.
Anderson Rob
Hoff Marc S.
Suarez Felix
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