Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1998-06-04
2000-10-03
Nelms, David
Static information storage and retrieval
Addressing
Plural blocks or banks
36518904, 36523003, 36523008, 365233, G11C 800
Patent
active
061282448
ABSTRACT:
The invention provides a memory access system and method of operation particularly useful with electronic storage devices having two or more memory units. Accessing of the memory units occurs one at a time and takes place using shared resources, such as shared row and column decoders. In a preferred embodiment, the invention permits the parallel reading of data from one memory unit of a plurality of memory units during a single system clock cycle using shared resources to perform addressing (e.g., read or write access) for the memory unit. The same shared resources are then used by any one of the other memory units during a subsequent system clock cycle to perform its own access function. By reading (or writing) data from (or to) one memory unit only during a single system clock cycle, the shared row and column decoders (and their attendant address lines) become available in a subsequent system clock cycle for use by another memory unit.
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Pawlowski Tom
Porter J. David
Thompson William N.
Weber Larren G.
Wilford John
Ho Hoai V.
Micro)n Technology, Inc.
Nelms David
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