Communications: electrical – Digital comparator systems
Patent
1974-08-19
1976-02-10
Dildine, Jr., R. Stephen
Communications: electrical
Digital comparator systems
3401463MA, G06F 1520
Patent
active
039381021
ABSTRACT:
A conventional word organized random access memory is modified for image processing operations so that the pq image points of any 1 .times. pq or p .times. q subarray of an rp .times. sq or smaller image array stored in the memory can be extracted or updated in a single memory cycle. The invention contemplates pq memory modules labeled from 0 to pq-1 for storing the image points, each module being able to store rs points in distinguishable cells, only one cell of which is randomly accessible in a single instant of time. The invention further contemplates accessing circuitry for causing each image point I(i,j) of an image array to be routed to or from a memory module M(i,j) according to the relation M(i,j)=(iq+j)//pq, where (iq+j)//pq is the remainder resulting from the integer division of (iq+j) by pq. The accessing circuitry additionally causes image point I(i,j) to be stored into or retrieved from a cell location A(i,j) of module M(i,j) according to the relation A(i,j)=(i/p)s+(j/q), where i/p and j/q represent integer quotients.
REFERENCES:
patent: 3766520 (1973-10-01), Patterson
Morrin Thomas Harvey
Van Voorhis David Curtis
Brodie R. Bruce
Dildine, Jr. R. Stephen
International Business Machines - Corporation
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