Patent
1994-05-13
1995-10-31
Bayerl, Raymond J.
G06F 1516
Patent
active
054637325
ABSTRACT:
In a parallel processing computer containing a plurality of processors, each connected to a memory unit, a method and apparatus for accessing a distributed data buffer. Each of the processors within the computer executes a first routine for processing input data to generate output data. During processing, some or all of the data associated with the processing is temporarily stored within a predefined portion of each of the memory units that form a portion of the distributed data buffer. Upon occurrence of an interrupt signal, execution of the first routine is halted. Also, the status of the computer at the time the interrupt signal occurred is stored in memory. Thereafter, a second routine (an interrupt routine) is executed to access the data stored in the data buffer. Once the data is accessed, the status of the computer is restored in accordance with the previously stored computer status information. Lastly, the first routine is restarted at a position therein at which the first routine was interrupted to execute the second routine.
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Kaba James T. C.
Taylor Herbert H.
Bayerl Raymond J.
Burke William J.
Chauhan U.
David Sarnoff Research Center Inc.
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