Method and apparatus for access to a PLA

Details Method and apparatus for access to a PLA Method and apparatus for access to a PLA

1986-03-27

1987-08-18

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307452, 307469, 307481, 307269, H03K 19096

Patent

active

046879595

ABSTRACT:
Improved access to programmable logic arrays is provided by continuously asserting and negating a latch inputs control signal, continuously asserting and negating a control signal which discharges a first logic section of the array to provide frequent, current inputs to a second logic section of the PLA and discharging the second section of the PLA only upon receipt of an access request. In the case of asynchronous access, it is also necessary to generate a synchronized data strobe from the unsynchronized one and to generate an acknowledge signal to indicate the presence of valid output data. The disclosed method and apparatus provide access which has a short access time and which also provides outputs which reflect relatively current states of the inputs thereto.

REFERENCES:
patent: 4317053 (1982-02-01), Shaw et al.
patent: 4429238 (1984-01-01), Harrison
patent: 4469964 (1984-09-01), Guttag et al.
patent: 4501977 (1985-02-01), Koike
patent: 4508977 (1985-04-01), Page et al.
patent: 4611133 (1986-09-01), Peterson et al.
patent: 4617480 (1986-10-01), Au
Balasubramanian et al, "Increasing Chip Density by Space Sharing of Programmed Logic Arrays", IBM TDB, vol. 20, No. 10, Mar. 1978, pp. 4016-4018.

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