Electrical computers and digital processing systems: interprogra – Common gateway interface program communication
Reexamination Certificate
2011-05-31
2011-05-31
Nguyen, Van H (Department: 2196)
Electrical computers and digital processing systems: interprogra
Common gateway interface program communication
C719S315000, C719S330000
Reexamination Certificate
active
07954108
ABSTRACT:
An HDL description of a communications protocol machine for transforming object communications into low-level octet sequences for physical transport is synthesized onto a programmable logic device such as an FPGA. This communications protocol machine replaces traditional software-based inter-ORB protocol engines in distributed computing environments, including embedded environments, to provide reduced latency. The communications protocol machine is described with two distinct elements: a protocol messaging machine and an encoder/decoder. The protocol messaging machine converts an object communication into a low-level octet sequence comprising one or more inter-ORB protocol messages and converts a low-level octet sequence comprising an inter-ORB protocol message into an object communication. The encoder/decoder encodes each data type associated with the object communication into a low-level octet sequence according to a set of rules, such as CDR, and decodes a low-level octet sequence into data types associated with the object communication according to the same rules.
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Aslam-Mir Shahzad
Humcke Frederick C.
Paniscotti Dominick
Baker & McKenzie LLP
Nguyen Van H
PrismTech Corporation
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