Method and apparatus for a video graphics circuit having...

Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors

Reexamination Certificate

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C345S440000, C345S582000

Reexamination Certificate

active

07123266

ABSTRACT:
A method and apparatus for parallel processing of pixel information within a video graphics circuit is accomplished when the video graphics circuit includes a set-up engine, an edgewalker circuit, a span processing circuit, and a plurality of pixel processing circuits. In such an embodiment, the set-up engine receives vertex information and produces object-element information therefrom. The object-element information is provided to the edgewalker circuit, which in turn produces span definition information. The span definition information identifies the starting pixel of a span and the starting pixel parameters. The span information is received by the processing circuit and converted into a plurality of pixel parameters. The plurality of pixel parameters are provided to the plurality of pixel processing circuits wherein each of the plurality of pixel processing circuits processes corresponding pixel parameters to produce pixel information in accordance with the information provided by the processing circuit.

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patent: 5594854 (1997-01-01), Baldwin et al.
patent: 5872902 (1999-02-01), Kuchkuda et al.
Akeley, K., “The Silicon Graphics 4D/240GTX Superworkstation”, Computer Graphics & Applications vol. 9, No. 4, Jul. 1989, as reprinted in Foley et al., “Computer Graphics Principles and Practice”, pp. 890-893.
Akeley, “The Silicon Graphics 4D/240GTX Superworkstation,” 1989, IEEE, pp. 71-83.
Akeley et al., “High-Performance Polygon Rendering,” 1988, ACM, pp. 239-246.

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