Method and apparatus for a trace buffer in an emulation system

Details Method and apparatus for a trace buffer in an emulation system Method and apparatus for a trace buffer in an emulation system

1994-02-16

1997-10-21

Teska, Kevin J.

G06F 1300

Patent

active

056805837

ABSTRACT:
A tracing method and apparatus for a digital emulation system. The invention allows trace information to be obtained during the emulation of a digital circuit that includes a clock signal. Input signal states are sensed and stored each clock cycle. The internal state of the emulated digital circuit is also stored. By using the stored input signal states and internal states, the states of other signals in the emulated digital circuit are derived.

REFERENCES:
patent: 3955180 (1976-05-01), Hirtle
patent: 4306286 (1981-12-01), Cocke et al.
patent: 4357678 (1982-11-01), Davis
patent: 4527249 (1985-07-01), Van Brunt
patent: 4583169 (1986-04-01), Cooledge
patent: 4587625 (1986-05-01), Marino et al.
patent: 4656580 (1987-04-01), Hitchcock et al.
patent: 4695968 (1987-09-01), Sullivan, II et al.
patent: 4697241 (1987-09-01), Lavi
patent: 4725971 (1988-02-01), Doshi et al.
patent: 4769817 (1988-09-01), Krohn et al.
patent: 4782461 (1988-11-01), Mick et al.
patent: 4787061 (1988-11-01), Nei et al.
patent: 4787062 (1988-11-01), Nei et al.
patent: 4819150 (1989-04-01), Jennings et al.
patent: 4862347 (1989-08-01), Rudy
patent: 4879646 (1989-11-01), Iwasaki et al.
patent: 4914612 (1990-04-01), Beece et al.
patent: 4972334 (1990-11-01), Yamabe et al.
patent: 5031129 (1991-07-01), Powell et al.
patent: 5036473 (1991-07-01), Butts et al.
patent: 5068812 (1991-11-01), Schaefer et al.
patent: 5084824 (1992-01-01), Lam et al.
patent: 5109353 (1992-04-01), Sample et al.
patent: 5114353 (1992-05-01), Sample
patent: 5126966 (1992-06-01), Hafeman et al.
patent: 5259006 (1993-11-01), Price et al.
patent: 5321828 (1994-06-01), Phillips et al.
patent: 5329470 (1994-07-01), Sample et al.
patent: 5329471 (1994-07-01), Swoboda et al.
patent: 5331571 (1994-07-01), Aronoff et al.
patent: 5345580 (1994-09-01), Tamaru et al.
patent: 5352123 (1994-10-01), Sample et al.
patent: 5377123 (1994-12-01), Hyman
patent: 5386550 (1995-01-01), Yumioka et al.
patent: 5396498 (1995-03-01), Lestrat et al.
patent: 5425036 (1995-06-01), Liu et al.
patent: 5437037 (1995-07-01), Furuichi
patent: 5448496 (1995-09-01), Butts et al.
patent: 5448522 (1995-09-01), Huang
patent: 5452231 (1995-09-01), Butts et al.
patent: 5452239 (1995-09-01), Dai et al.
patent: 5475624 (1995-12-01), West
patent: 5475830 (1995-12-01), Chen et al.
patent: 5477475 (1995-12-01), Sample et al.
patent: 5551013 (1996-08-01), Beausoleil et al.
patent: 5572710 (1996-11-01), Asano et al.
Agarwal, Anant, "Virtual Wires.TM.:A Technology for Massive Multi-FPGA Systems", Virtual Machine Works (no publication date given), pp. 1-24.
Goering, R., "Emulation for the Masses", Electronic Engineering Times, Jan. 29, 1996, p. 63.
Sim Express Specifications, Mentor Graphics, Sim Express Hardware Emulator.
Maliniak, L., "Pin Multiplexing Yields Low-Cost Logic Emulation," Electronic Design, Jan. 22, 1996, pp. 65-66.
Michael C. McFarland et al., "The High-Level Synthesis of Digital Systems", Proceedings of the IEEE, Feb. 1990, vol. 78, No. 2, pp. 301-316.

Affiliated with

Also associated with

Rating

Method and apparatus for a trace buffer in an emulation system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for a trace buffer in an emulation system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for a trace buffer in an emulation system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1014963