Multiplex communications – Pathfinding or routing – Store and forward
Reexamination Certificate
1999-07-02
2003-01-28
Patel, Ajit (Department: 2664)
Multiplex communications
Pathfinding or routing
Store and forward
C341S051000, C725S091000, C708S203000
Reexamination Certificate
active
06512775
ABSTRACT:
BACKGROUND OF THE INVENTION
I. Field of the Invention
The present invention relates to techniques for parsing a digital bitstream, and more specifically, to programmable audiovisual and generic bitstream parsing techniques.
II. Description of the Related Art
In the digital environment, information is generally transmitted between systems in the form of coded bitstreams which represent audiovisual or other generic data. In order to be usable by the receiving system, not only must such coded bitstreams must be decoded, but the bitstream must be parsed, i.e., separated into semantically meaningful units or “objects.”
For example, in the case of an MPEG-2 encoded bitstream, the bitstream must be parsed into slices and macroblocks before the information contained in the bitstream is usable by an MPEG-2 decoder. The MPEG-2 decoder uses the parsed bitstream to reconstruct the original audiovisual information.
In the past, the parsing operation has been performed by custom-manufactured hardware and/or software. Such bitstream parsers would be programmed to separate an incoming bitstream based on some preselected objective rules or criterion, such as the intrinsic characteristics of packets of information in the bitstream, or transitions in characteristics between consecutive packets of information. An example of such a parser is presented in U.S. Pat. No. 5,414,650 issued May 9, 1995, to Hekhuis.
However, a significant problem with such a bitstream parser lies in the fact that the parsing rules are inflexible to changes in the syntax of the incoming bitstream. For this reason, there have been several attempts to construct bitstream parsers which are in some sense “programmable” so that bitstreams with differing syntax can be accepted by the same parser by reprogramming, rather than replacing, the parser.
For example, U.S. Pat. No. 5,371,547, issued Dec. 6, 1994, to Siracusa et al., discloses an apparatus for excising and reinserting invariable and variable data from an MPEG video data stream in order to reduce transmission bandwidth. The apparatus includes a parser which separates transport header data and encoded MPEG payloads for presentation to an MPEG decoder in a suitable format. The parser, which examines each transport header to determine if the corresponding payload contains slice data, may be programmed to respond to the particular encoded protocol.
European Patent Application No. 94107818, published Jul. 12, 1994, of Matsushita Electric Industrial Co., Ltd. discloses an apparatus for re-compressing encoded video data into a more compact form that is suitable for recording on a digital storage medium. The apparatus includes a variable length decoder (“VLD”) for parsing an input bitstream and for extracting quantization parameters and/or quantized coefficients from other information. The VLD is implemented by way of a programmable digital signal processor (“DSP”), which may extract coefficients or both parameters and coefficients.
While the above-mentioned techniques present bitstream parsers that are programmable by an external user, they fail to provide a fully flexible parser because an external programmer must reprogram the parser every time a new syntax is encountered by the parser. Accordingly, the prior art techniques do not provide for self-configuration of the parser based on the syntax of the bitstream, but require external programming to adapt to changes in the bitstream syntax. Therefore, there exists a need in the art for a bitstream parsing technique which is fully adaptable to the syntax used in the bitstream without the requirement of interrupting the parsing operation to reprogram the bitstream parser every time a new syntax is encountered.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a bitstream parsing technique which is programmable by the bitstream itself.
A further object of the present invention is to provide a parsing technique which is capable of redefining objects, recognizing certain context-sensitive objects, and recognizing certain repetitive objects during the parsing operation.
A still further object of the present invention is to provide an audiovisual and generic bitstream parsing technique which is programmable by an incoming bitstream that contains programming software embedded into the audiovisual or generic data, so that the parsing process may be tailored depending on the specific application.
In order to meet these and other objects which will become apparent with reference to further disclosure set forth below, the present invention provides a parser for parsing a digital bitstream which includes both data information and programming information. The parser includes a buffer, a mode selector, a control circuit, and a data processor. The mode selector determines whether one or more bits of the bitstream segment represent a mode selection code, and selects a parser mode in response to the mode selection code. The control circuit receives and stores bits from the buffer when the bitstream parser is in a program mode in order to reprogram the control circuit with newly received program information, and uses the program information to generate one or more parsing signals when the bitstream parser is in a data mode. The data processor receives bits from the buffer and parsing signals from the command circuit when the bitstream parser is in the data mode, and parses the received bits in accordance with the parsing signals.
In a preferred arrangement, the buffer is a shift buffer having a plurality of parallel outputs for bits of the bitstream segment which it stores, and the parser includes one or more buffer isolation gates to isolate each parallel output of the shift buffer and to provide one or more non-isolated bits of the bitstream segment to the data processor and the control circuit.
In an especially preferred arrangement, the program mode selection and data mode selection codes are simply start and end program codes, respectively. In such an embodiment, the mode selector advantageously includes a first logic circuit which receives one or more bits of the bitstream segment from the buffer isolation gates, compares such bits with one or more bits of the start and end program codes, and generates a signal indicative of a program mode when a start code is determined or when a program mode signal was generated in an immediately previous cycle and an end code is not determined.
Such a mode selector also includes a second logic circuit generating a wait signal whenever the start or end program codes are determined by the first logic circuit, and providing the wait signal to the buffer isolation gates so that any gate corresponding to a bit position of the shift buffer containing a bit corresponding to the start or end program codes is disabled.
The control circuit may include a memory to receive and store program information for the bitstream parser and to receive and store the one or more bits of new program information, and to reprogram the stored program information when the new program information is received by the control circuit, as well as an instruction decoder circuit to retrieve program information from the memory and generating the one or more parsing signals based on the retrieved program information.
In another preferred arrangement, the control circuit also includes a program counter to generate addresses of storage locations in the memory to retrieve program information whenever the wait signal is not generated. The control circuit may generate a wait value signal, where the logic circuit is responsive to the wait value signal in generating the wait signal.
Advantageously, the instruction decoder can be connected to the mode selector to receive the mode signal, and to the buffer to receive new programming information, where one or more bits of the bitstream segment representing such programming information are stored in the memory only when the instruction decoder receives the program mode signal.
The instruction decoder circuit may also beneficially be linked to the data memory to retrieve previou
Eleftheriades Alexandros
Fang Yihan
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