Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
Reexamination Certificate
2006-06-20
2006-06-20
Vaughn, Jr., William C. (Department: 2143)
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
Computer-to-computer data transfer regulating
C709S203000, C709S231000, C370S447000, C370S461000
Reexamination Certificate
active
07065580
ABSTRACT:
A computer system coupled with a pipelined network includes a plurality of initiator nodes coupled to send packets into the network. A plurality of target nodes receive packets sent into the network. The network uses a plurality of pipeline stages to transmit data across the network. Each pipeline stage consumes a known time period, which provides for a predetermined time period for transmission for each packet that is successfully sent from one of the initiator nodes to one of the target nodes. The pipelined network is synchronous in that boundaries of all the pipeline stages are aligned. The pipeline stages include at least an arbitration stage to obtain a path through the network, a transfer stage during which a data packet is transmitted, and an acknowledge stage during which successful transmission of a packet is indicated by the target. To simplify network design, all the pipeline stages are implemented to have equal length.
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Eberle Hans
Wilhelm Neil C.
Nguyen Phuoc H.
Sun Microsystems Inc.
Vaughn, Jr. William C.
Zagorin O'Brien Graham LLP
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