Electrical computers and digital processing systems: multicomput – Network-to-computer interfacing
Reexamination Certificate
2003-11-19
2009-08-04
Etiene, Ario (Department: 2453)
Electrical computers and digital processing systems: multicomput
Network-to-computer interfacing
C370S389000, C370S469000
Reexamination Certificate
active
07571258
ABSTRACT:
A method for efficiently processing layers of a data packet is provided. The method initiates with defining a pipeline of processors communicating with a distributed network and CPU of a host system. Then, a data packet from the distributed network is received into a first stage of the pipeline. Next, the data packet is processed to remove a header associated with the first stage. Then, the processed data packet is transmitted to a second stage. The operations of processing and transmitting the processed data packet are repeated for successive stages until a header associated with a final stage has been removed. Then, the data packet is transmitted to the CPU of the host system. It should be appreciated that the header is not necessarily transformed at each stage. For example, suitable processing that does not strip the header may be applied at each stage.
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Gopalan Mahesh
Mitra Anjan
Mukund Shridhar
Adaptec, Inc.
Chea Philip J
Etiene Ario
Martine & Penilla & Gencarella LLP
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