Method and apparatus for a monolithic integrated MESFET and...

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S425000, C257S438000, C257S439000, C257S458000, C438S057000, C438S069000, C438S075000, C438S762000

Reexamination Certificate

active

06429499

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of forming an integrated MOSFET and p-i-n optical receiver.
2. Description of the Related Art
Optoelectronic integrated circuits (OEIC), which may often consist if a p-i-n (PIN) photodector and field effect transistor (FET), are commonly used in high speed digital optical communication systems. One goal in designing an integrated photodetector and transistor, is to design a structure that optimizes the manufacturing process of the two elements, photodetector and transistor. Another goal is to optimize bandwidth in the photodetector and, at the same time, the responsiveness of the photodetector to light. In photodector design, a trade-off is made between capacitance and the speed or bandwidth of transmissions in the photodetector. Another goal is to operate at low supply voltages while maintaining a high bandwidth. Thus, there is a need in the art for a structure and manufacturing process for an improved monolithic lateral integrated transistor and photodetector that maintains a relatively high bandwidth, high responsivity of the photodetector to light, and that is capable of operating at low supply voltages.
SUMMARY OF THE PREFERRED EMBODIMENTS
To overcome the limitations in the prior art described above, preferred embodiments disclose a semiconductor structure and manufacturing process for making an integrated field effect transistor (FET) and photodetector optical receiver on a semiconductor substrate. The FET is formed by forming at least one p region in a p-well of the substrate and forming at least one n region in the p-well of the substrate. A p-i-n photodetector is formed in the substrate by forming at least one p region in an absorption region of the substrate when forming the at least one p region in the p well of the FET and forming at least one n region in the absorption region of the substrate when forming the at least one n region in the p-well of the FET.
Preferred embodiments provide an improved technique for producing a monolithically integrated optical receiver in which the photodetector and preamplifier circuit share a common substrate. Monolithic integration is advantageous over hybrid integration, in which the photo-detector and amplifier circuits are fabricated separately and then interconnected as the cost of manufacturing is less, the yield is higher, and the performance is improved due to a reduction in packaging parasitics. Further, preferred embodiments allow the production of an integrated amplifier and optical receiver that can be used in high speed communication and, at the same time, is capable of operation at low supply voltages.


REFERENCES:
patent: 5357127 (1994-10-01), Park et al.
patent: 5598022 (1997-01-01), Kyomasu
patent: 5818096 (1998-10-01), Ishibashi et al.
patent: 5904493 (1999-05-01), Lee et al.
patent: 5973367 (1999-10-01), Williams
patent: 6005266 (1999-12-01), Forrest et al.
patent: 6051471 (2000-04-01), Gardner et al.
patent: 6072224 (2000-06-01), Tyson et al.
patent: 6100551 (2000-08-01), Lee et al.
patent: 6184055 (2001-02-01), Yang et al.
S. Tiwari, et al., “Lateral p-i-n Photodectectors with 18 GHz Bandwidth at 1.3 &mgr;m Wavelength and Small Bias Voltages”, IBM Research Division, IBM Thomas J. Watson Research Center, Yorktown Heights, New York, pp. 1-4.
J.N. Haralson II, et al., “Theoretical Study of a GaAs Lateral p-i-n Photodetector”, Applied Physics Letters, vol. 72, No. 13, Mar. 30, 1998, pp. 1641-1643.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for a monolithic integrated MESFET and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for a monolithic integrated MESFET and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for a monolithic integrated MESFET and... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2935061

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.