Boots – shoes – and leggings
Patent
1994-10-05
1995-11-07
Chan, Eddie P.
Boots, shoes, and leggings
364DIG1, 3642563, 3642564, 3642592, 3642597, 395416, 3954211, 39542111, G06F 1210, G06F 1200
Patent
active
054653371
ABSTRACT:
A memory management unit for translating a virtual address into a corresponding physical address including a translation lookaside buffer and a comparator. The translation lookaside buffer includes a plurality of entries, each of the entries having a first number of bits to indicate a virtual page number, a second number of bits to indicate an offset into the page, a third number of bits to indicate either a portion of a page number or a portion of an offset value, a fourth number of bits to indicate a page size, and a fifth number of bits for storing a physical address of a page of memory. The comparator compares a number of bits equal to the virtual page size of a virtual address presented to the translation lookaside buffer with the virtual addresses stored in entries of the translation lookaside buffer. If the result of the comparison produces a match/hit, the physical address is concatenated with the bits of the second and third number of bits using the stored page size to provide a physical address. When the comparison produces a miss, an assumed page size is used to access a table in memory from which the physical addresses may be derived.
REFERENCES:
patent: 4356549 (1982-10-01), Chueh
patent: 4731740 (1988-03-01), Eguchi
patent: 4774653 (1988-09-01), James
patent: 4992936 (1991-02-01), Katada et al.
patent: 5133058 (1992-07-01), Jenson
patent: 5263140 (1993-11-01), Riordan
Bragdon Reginald G.
Chan Eddie P.
Sun Microsystems Inc.
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