Method and apparatus for a low parasitic capacitance...

Etching a substrate: processes – Forming or treating optical article

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C216S041000, C216S074000, C216S079000, C216S067000, C438S455000, C438S459000

Reexamination Certificate

active

07368062

ABSTRACT:
Undoped layers are introduced in the passive waveguide section of a butt-joined passive waveguide connected to an active structure. This reduces the parasitic capacitance of the structure.

REFERENCES:
patent: 4656636 (1987-04-01), Amann et al.
patent: 5585957 (1996-12-01), Nakao et al.
patent: 5796902 (1998-08-01), Bhat et al.
patent: 5862168 (1999-01-01), Schilling et al.
patent: 2002/0176467 (2002-11-01), Yang et al.
patent: 2003/0223672 (2003-12-01), Joyner et al.
patent: 0 532 816 (1993-03-01), None
patent: 2003069136 (2003-03-01), None
patent: 9305236 (1993-06-01), None
patent: WO 03/032036 (2003-04-01), None
Dr. Callon in Microfabrication Cleanroom Session; Dr Gary J Callon; Practical Introduction to Photolithography & Etching.
Pricipals of Light Generation in Semiconductor Diode Devices; University of Strathclyde, Glassglow; Dec. 25, 2002; www.eee.strath.ac.uk/ug-info/19984/comob3a.pdf.
PMMA as an etch mask for silicon micromachining—a feasibility study; Bodas et al.; Indo-Japanese Workshop no Microsystem technology; New Delhi; Nov. 2000.
http:/en.wikipedia.org/wiki/Quantum—well; definition; Aug. 2006.
Vertically tapered polymer waveguide mode size transformer for improved fiber coupling; Chen et al.; 2000 Society of Photo-Optical Instrument Engineers; vol. 39; p. 1507-1516; Jun. 2000.
Dr. Callon in Microfabrication Cleanroom Session; Dr Gary J Callon; Practical Introduction to Photolithography & Etching, published May 2005.
Van Zant; Microchip Fabrication; p. 191, 197. 259; McGraw Hill; 3rded.; 1997.
Wayback Machine; http://www.archive.org/web/web.php; printed 2007.
European search report of Feb. 22, 2006 for Application No. 05006936.8-2216.
J.T. Zhu et al., “Performance comparison between integrated 40 Gb/s EAM devices grown by selective area growth and butt-joint overgrowth”, Journal of Crystal Growth, vol. 272, No. 1-4, May 30, 2004, pp. 576-581, XP-002363782.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for a low parasitic capacitance... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for a low parasitic capacitance..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for a low parasitic capacitance... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2788884

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.