Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2000-09-19
2002-02-12
Riley, Shawn (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S224000
Reexamination Certificate
active
06346801
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to electronics, and, more particularly, to a DC-DC converter that addresses the problem of voltage regulation on a variable load.
BACKGROUND OF THE INVENTION
Voltage regulation circuits typically provide a certain voltage that is maintained constant by feeding back the output. In a pulse width modulation (PWM) switching regulator, a square wave drives the control terminal of a switch determining its conduction or cut-off state. By increasing the time interval of conduction of the switch, the output voltage increases. The opposite occurs by increasing the time interval of the cut-off. The output voltage is thus controlled by varying the duty cycle of the square wave driving signal. Such a control of the duty cycle is performed by a circuit which continuously compares the output voltage with a reference voltage, and adjusts the duty cycle of the square wave to keep constant the output voltage.
When the switch is a MOS transistor, a non-negligible power is required to charge periodically the gates of the switching transistors. The switching power loss increases as the switching frequency increases. This negatively effects the converter efficiency. Alternatively, the requirement of limiting the variations of the voltage applied to the load within a tolerable range does not permit reduction of the switching frequency as much as desired.
To maximize the conversion efficiency of a switching regulator, several manufactures implement a pulse frequency modulation (PFM) technique, or a skip mode. This technique controls the peak value of the current flowing in the inductor while operating in a discontinuous mode.
In the commercial device MIC 2177/8/9 provided by Micrel Inc., a control with constant current peaks is formed as long as the load remains relatively low. For high loads, the control reverts to a traditional PWM control at a fixed switching frequency. This technique does not maximize efficiency because it does not minimize the switching power losses and the power losses in the driver steps of the power MOS transistor that are predominant under low load conditions.
An approach for reducing the switching power losses is disclosed in U.S. Pat. No. 5,568,044, which is assigned to Micrel Inc. A controller for a DC-DC converter is disclosed for implementing the two different control techniques, i.e., the pulse width modulation or the pulse frequency modulation. The one with the lowest power dissipation upon a change of load conditions is used.
SUMMARY OF THE INVENTION
In view of the foregoing background, it is an object of the present invention to provide a method for controlling a DC-DC converter through an iterative procedure that makes the circuit operate at optimal conditions by adapting to any variation of the load. The method may be used with other known techniques for controlling a DC-DC converter, e.g., PWM and PFM.
According to another aspect of the invention, the controller, designed to adjust the switching frequency to be close as possible to the optimal frequency, minimizes switching power losses and driver losses. This maximizes the power being transferred from the supply to the load. The output voltage is preferably compared with a pre-established low threshold and a pre-established high threshold. A certain minimum electric charge to be transferred is injected into the inductor of the converter during a conduction interval or phase of a power switch.
The method includes commanding the beginning of a conduction phase charge period each time the output voltage reaches the low threshold, and progressively increases the electric charge that is transferred during each charge period until the output voltage reaches the high threshold starting from the low threshold in a charge period. The duration of the off interval of the switch is preferably monitored and stored between two consecutive charge periods. The current off interval is preferably compared with the previously stored off interval. The minimum value of the electric charge that is transferred is decreased when an increment of the off interval of the switch between two consecutive charge periods is detected.
The method of the invention may be implemented by forming a DC-DC converter using one or more power switches, and driving in a switching mode an inductor transferring electric charge from a supply node to a load of the converter. The power switches may be controlled by charge or not charge commands after executing start-up of the DC-DC converter, and by voltage regulation and efficiency boosting algorithms within a controller.
The DC-DC converter preferably further includes a pair of comparators receiving the output voltage of the converter for respectively comparing with a high threshold and a low threshold. The thresholds are established by the controller by way of digital data that is converted by a first digital/analog converter into a reference voltage that is applied to the reference inputs of the pair of comparators. Respective outputs of the pair of comparators are connected to the controller. The current through a power switch for charging the inductor is preferably monitored. The reaching of the null value of the current in the inductor is also preferably monitored.
A comparator compares either a linear voltage ramp with a certain slope or a voltage value proportional to the current charging the inductor through a power switch with a reference voltage (REF). The reference voltage corresponds to a digital value N that is produced by the controller, and is converted to a comparison voltage by a second digital/analog converter (DAC2).
REFERENCES:
patent: 5568044 (1996-10-01), Bittner
patent: 5801518 (1998-09-01), Ozaki et al.
patent: 5808455 (1998-09-01), Schwartz et al.
patent: 5945820 (1999-08-01), Namgoong et al.
MIC2178 2.5A Synchronous Buck Regulator Micrel, Inc. Datasheet, Online! Jun. 1998, XP002130725 San Jose, CA, U.S.A. pp. 1-16.
MIC2179 1.5A Synchronous Buck Regulator Micrel, Inc. Datasheet, Online! Jun. 1998, XP002130726 San Jose, CA U.S.A. pp. 1-16.
MIC2177 2.5A Synchronous Buck Micrel, Inc. Datasheet, Online! Apr. 1999, XP002130724 San Jose, CA. U.S.A. pp. 1-16.
Bassani Simone Christian
Zafarana Alessandro
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Jorgenson Lisa K.
Riley Shawn
STMicroelectronics S.r.l.
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