Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2000-03-16
2001-09-04
Picard, Leo P. (Department: 2835)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S704000, C361S707000, C361S709000, C361S760000, C361S712000, C257S706000, C257S707000, C257S713000, C174S051000, C174S050510, C174S252000, C165S080200, C165S185000
Reexamination Certificate
active
06285554
ABSTRACT:
FIELD OF INVENTION
The present invention relates to a method for connecting a component, such as a chip or like component, to a conductive carrier surface, such as an earth plane on a printed circuit board or the like, in a compact design, and also to an arrangement for connecting a component so as to achieve conduction between said component and a carrier, such as between a chip and a printed circuit board, in a compact design.
DESCRIPTION OF THE BACKGROUND ART
It is known to mount substrate.
1
with chip
2
on printed circuit board
3
. In compact designs, with a multi-layer ceramic carrier substrates, the discrete components/the chips are mounted on the underside of the substrate between said substrate and the printed circuit board, wherewith heat generated in the components can be transmitted solely to the substrate and from there to the circuit board and its various connections, such as contact pins or beads
4
of solder that melt at high temperatures located between the substrate and the printed circuit board. The connections function as electrical connections and as mechanical spacing means, this latter by virtue of being slightly larger than the remaining discrete components on the underside of the substrate. The components can be shielded by providing on the circuit board, immediately beneath the components, an earth plane
5
which, together with the earth plane of respective components, shields said components without the discrete components being in contact with the earth plane. The substrate-mounted components are liable to generate heat in operation, which in certain cases may be quite considerable. It is therefore important that the thermal contact achieved between the components/the chips and the printed circuit board with its wide copper surfaces is as effective as possible. Because none of the discrete components have direct contact with the circuit board, the major part of the heat generated in said components must be transferred to the circuit board via the substrate and the circuit board connections. In the case of ceramic substrates, the greatest temperature gradient occurs in the longitudinal direction of the substrate in these instances, because ceramics are relatively poor conductors of heat. Transistors in the components may well become damaged at excessively high temperatures, as a result of the poor thermal conductivity of the ceramic substrate.
SUMMARY OF THE INVENTION
With the intention of protecting a component, such as a chip, that is mounted on a ceramic substrate connected to a carrier, such as a printed circuit board, from damage as a result of the limited thermal conductivity of the ceramic, the chip has been connected directly to the circuit board with a thin layer that provides the absolute shortest path to the circuit board. Direct connection of the chip with the circuit board can be achieved by soldering the chip so that its height, which is critical, will be essentially the same as the height of the connections, and by mounting the rear side of the chip directly to the circuit board with a thin layer of adhesive or solder. An acceptable substrate earth can be obtained, by metallizing the rear side of the chip and making the connection between the rear side of the chip and the earth plane on the printed circuit board electrically conductive.
REFERENCES:
patent: 4855867 (1989-08-01), Gazdik et al.
patent: 4868349 (1989-09-01), Chia
patent: 5045921 (1991-09-01), Lin et al.
patent: 5138439 (1992-08-01), Kobiki
patent: 5170931 (1992-12-01), Desai et al.
patent: 5297006 (1994-03-01), Mizukoshi
patent: 5517753 (1996-05-01), Messina
patent: 5633533 (1997-05-01), Andros et al.
patent: 5724230 (1998-03-01), Poetzinger
patent: 5768774 (1998-06-01), Wilson et al.
patent: 5770478 (1998-06-01), Iruvanti et al.
patent: 5786635 (1998-07-01), Alcoe et al.
patent: 5819402 (1998-10-01), Edwards et al.
patent: 5825087 (1998-10-01), Iruvanti et al.
patent: 5834839 (1998-11-01), Mertol
patent: 5854507 (1998-12-01), Miremadi et al.
patent: 6122171 (2000-09-01), Akram et al.
Burns Doane Swecker & Mathis L.L.P.
Chervinsky Boris L.
Picard Leo P.
Telefonaktiebolaget LM Ericsson (publ)
LandOfFree
Method and an arrangement for the electrical contact of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and an arrangement for the electrical contact of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and an arrangement for the electrical contact of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2524213