Method and a digital electronic device for the evaluation of an

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3401462, G06F 702, G06F 724

Patent

active

051229790

ABSTRACT:
A method and a device (FIG. 2) in which the maximum or the minimum or both of a data set are evaluated by tag propagation through a series of iterations. The number of iterations required is equal to the word size, i.e. the number of bits per word. Iterations may be performed serially using a series of logic stages, as shown, or they may be performed cyclically using a single stage of logic circuitry. For the evaluation of the maximum, a tag is propagated for each word for which a tag has already been propagated from the previous iteration and either the word bit for that iteration is of logic value 1 or if not 1 the word bit for each and every word for that iteration is 0. A tag is propagated throughout all iterations only for the maximum and this tag is then used to select the corresponding data word that is the maximum. The same may be performed for the inverse of each word bit to evaluate the minimum. In this case a tag is propagated for each word for which a tag has been propagated from the previous iteration and either the word bit represented is 0 or if not 0 when the word bits for that iteration are all 1.
Implementations are disclosed for both ordinary logic Active HIGH, and for inverted logic, Active LOW.
The electronic devices may be combined in parallel and in series to allow evaluation of larger word sets.

REFERENCES:
patent: 4446452 (1984-05-01), Munter
patent: 4918636 (1990-04-01), Iwata et al.
patent: 4998219 (1991-03-01), Frauenglass
Yuen, "A Bit-Serial Device for Maximization and Sorting" Proceedings of the IEEE, vol. 68, No. 2, Feb. 1980, pp. 296-297.

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