Method and a device for synchronization of messages

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328155, 324 83FE, 315194, G01S 130

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045933790

ABSTRACT:
A method and device for synchronization of messages, wherein the phase of a reception clock signal is controlled in dependence on the phase of the messages received by causing the absolute value of the phase of the reception clock signal to vary by the quantity A.sub.i (2.pi./N) at the "i.sup.th " transition of the received message, the sequence .vertline.A.sub.i .vertline. being a sequence of decreasing whole numbers where i varies from 1 to p and 2.pi./N designates the elementary step of variation of phase of the reception clock signal. The device includes a read-only memory for storing the values A.sub.i.

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patent: 4095186 (1978-06-01), Vesel
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patent: 4215314 (1980-07-01), Addor
patent: 4288874 (1981-09-01), Yamada
patent: 4384500 (1983-05-01), Friberg
patent: 4457005 (1984-06-01), Burke et al.
Proceedings of the Symposium on Computer Processing in Communications, Apr. 8-10, 1969, "Linear Adaptation" by Allen Gersho, pp. 653-664.

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