Method and a circuit for encoding a digital signal to determine

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364754, G06F 15347

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active

052185656

ABSTRACT:
The invention relates to encoding a digital signal to determine the scalar product of two vectors. For two vectors of the same dimension p, one having dedicated components {ak} and the other having variable components {xk}, the scalar product value ##EQU1## is reduced to partial sums fi of binary variables xki, which binary variables take one of the values of the fixed components ak depending on the values of the xki having m possible values. Dedicated logic encoding makes it possible to take the variables xki and generate a plurality of bit level elementary partial sums fij for each bit of rank j in fi, having 2.sup.m possible values, by varying the binary values akj of the bits of rank j. A two-dimensional interconnection matrix causes each rank j bit akj to correspond to a single value of the elementary partial sums fij, and together these bits define the corresponding partial sum fi. The invention is applicable to circuits for image processing or for data compression by the discrete cosine transform.

REFERENCES:
patent: 4573136 (1986-02-01), Rossiter
patent: 4701876 (1987-10-01), McCasny et al.
patent: 4736335 (1988-04-01), Barkan
patent: 4884232 (1989-11-01), Schlunt
patent: 4974186 (1990-11-01), Duhamel et al.
patent: 5032865 (1991-07-01), Schlunt
Proceedings of the 8th, symposium on Computer Arithmetic, 19 mai 1987, Villa Olmo, Como, Italie, pp. 13-20; S. Smith et al.: "Synthesis of Area-Efficient VLSI Architectures for Vector and Matrix Multiplication".

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