Metastable sense circuit

Details Metastable sense circuit Metastable sense circuit

1989-12-13

1991-05-21

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 3072721, 307359, 307181, H03K 520, H03K 19086

Patent

active

050178148

ABSTRACT:
A metastable sense circuit includes an input latch and a sense latch. The input latch passes data from the input to the output in a transparent mode and retains data at the output in a hold mode in response to a clock signal. The output of the input latch is coupled to an input of the sense latch. A logic signal is provided at the output of the sense latch responsive to an occurrence of a metastable state of the input latch in a transparent mode and retains data at the output in a hold mode in response to a clock signal. The input section of the sense latch includes a reference voltage generator that tracks changes in the logic switching threshold of the output of the input latch.

REFERENCES:
patent: 3686512 (1972-08-01), Kroos
patent: 4041326 (1977-08-01), Robinson
patent: 4147943 (1979-04-01), Peterson
patent: 4408134 (1983-10-01), Allen
patent: 4748346 (1988-05-01), Emori
patent: 4777388 (1988-10-01), Widener
patent: 4779009 (1988-10-01), Tsunoi et al.
patent: 4810908 (1989-03-01), Suzuki et al.
patent: 4900954 (1990-02-01), Franz et al.
patent: 4926066 (1990-05-01), Maini et al.

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