Metastable defeating fli-flop

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307443, 3072992, H03K 3286

Patent

active

048002968

ABSTRACT:
A flip-flop has a master section (74) comprising two transistors (40, 48). The second transistor (48) has two emitters, the second emitter conducting in response to a metastable condition wherein both transistors (40,48) are conducting concurrently, resulting in a metastable output. The second emitter (76) draws additional current through the second transistor (48) after a delay provided by a second clock (78), thus disrupting the equilibrium of the master section (74). By drawing additional current, the second transistor (48) will turn the first transistor (40) off, enabling a valid output.

REFERENCES:
patent: 4093878 (1978-06-01), Paschal et al.
patent: 4398105 (1983-08-01), Keller
patent: 4473760 (1984-09-01), Ambrosius, III et al.
patent: 4575644 (1986-03-01), Leslie
patent: 4591737 (1986-05-01), Campbell

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