Fishing – trapping – and vermin destroying
Patent
1986-06-24
1987-09-29
Hearn, Brian E.
Fishing, trapping, and vermin destroying
148DIG20, 148DIG51, 148DIG158, 156656, 357 68, 437228, H01L 21306, B44C 122
Patent
active
046960988
ABSTRACT:
The invention discloses an improved process for forming one or more metal strips on an integrated circuit structure by wet etching of a metal layer which comprises forming an intermediate layer over the integrated circuit structure; forming slots in the intermediate layer; forming a metal layer over the intermediate layer; and wet etching the metal layer sufficiently to remove all metal in the slots while retaining metal on the intermediate layer between the slots to form the desired one or more metal strips. Multiple levels of metal strips may be formed in an integrated circuit structure using the method of the invention.
REFERENCES:
patent: 4076860 (1978-02-01), Kuroda
patent: 4510016 (1985-04-01), Chi et al.
patent: 4533431 (1985-08-01), Dargent
patent: 4584761 (1986-04-01), Wu
patent: 4586980 (1986-04-01), Hirai et al.
patent: 4597826 (1986-07-01), Majima et al.
patent: 4619037 (1986-10-01), Taguchi et al.
patent: 4648939 (1987-03-01), Maa et al.
patent: 4661204 (1987-04-01), Mathur et al.
patent: 4662989 (1987-04-01), Casey et al.
Sachdev et al., "Tungsten Interconnects in VLSI", Proceedings of the 1985 Workshop, Oct. 7-9, 1985, Albuquerque, NM, pp. 161 & 171.
Advanced Micro Devices , Inc.
Bunch William
Hearn Brian E.
King Patrick T.
Taylor John P.
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