Stock material or miscellaneous articles – All metal or with adjacent metals – Composite; i.e. – plural – adjacent – spatially distinct metal...
Reexamination Certificate
2000-01-18
2001-07-10
Jones, Deborah (Department: 1775)
Stock material or miscellaneous articles
All metal or with adjacent metals
Composite; i.e., plural, adjacent, spatially distinct metal...
C428S632000, C428S650000, C428S651000, C428S698000, C257S750000, C257S751000, C257S764000, C257S765000, C257S771000, C438S625000, C438S626000, C438S627000
Reexamination Certificate
active
06258466
ABSTRACT:
BACKGROUND OF THE INVENTION
1. The Field of the Invention
The present invention relates to the formation of metal interconnect stacks. More particularly, the present invention relates to the formation of titanium aluminide during the sputtering of the metal interconnect stack to improve metallization performance and reliability.
2. The Relevant Technology
Integrated circuits are manufactured by an elaborate process in which a variety of different electronic devices are integrally formed on a small silicon wafer. Conventional electronic devices include capacitors, resistors, transistors, diodes, and the like. In advanced manufacturing of integrated circuits, hundreds of thousands of electronic devices are formed on a single wafer.
One of the steps in the manufacture of integrated circuits is to form metal interconnect lines between the discrete electronic devices on the integrated circuit. The metal interconnect lines allow for an electrical current to be delivered to and from the electronic devices so that the integrated circuit can perform its intended function.
The metal interconnect lines generally comprise narrow lines of aluminum. Aluminum is typically used because it has a relatively low resistivity, good current-carrying density, superior adhesion to silicon dioxide, and is available in high purity. Each of these properties is desirable in contact lines since they result in a quicker and more efficient electronic circuit.
The computer industry is constantly under market demand to increase the speed at which integrated circuits operate and to decrease the size of integrated circuits. To accomplish this task, the electronic devices on a silicon wafer are continually being increased in number and decreased in dimension. In turn, the dimension of the metal interconnect lines must also be decreased. This process is known as miniaturization.
Metal interconnect lines are now believed to be one of the limiting factors in the miniaturization of integrated circuits. It has been found, however, that by using more than one level in the interconnect, the average interconnect link is reduced and with it the space required on the integrated circuit. Thus, integrated circuits can further be reduced in size. These multi-level metals are referred to as metal interconnect stacks, named for the multiple layers of different metal, such as titanium/aluminum/titanium nitride, which are stacked on top of each other. The metal interconnect stacks are formed by repeating the techniques used to form the planar metal interconnect lines. For example, after patterning a first metal level, another inter-level dielectric can be deposited and planarized, followed by via and third metal patterning, and so on. Aluminum has been found to be well suited for the upper levels in these metal interconnect stacks.
As heat treatments following metal deposition steps get longer and higher temperatures occur, a phenomenon referred to as “void formation” has been found to occur more frequently. In general, void formation is a process in which minute voids formed within the metal stack of the metal interconnect line coalesce at flux divergence sites, such as grain boundary triple points, of the metal interconnect line. As a result of the coalescing of the voids, the aluminum in the line begins to narrow at a specific location. If the aluminum gets sufficiently narrow, the metal interconnect line can void out so as to cause a gap in the line. Such a gap results in an open circuit condition and prevents the integrated circuit from operating in a proper manner.
Void formation is generally caused by either electromigration or stress migration. Electromigration occurs as an electrical current flows through an aluminum portion of an interconnect line. When a voltage is applied across the aluminum, electrons begin to flow through the aluminum. These electrons impart energy to the aluminum atoms sufficient to eject aluminum atoms from their lattice sites. As the aluminum atoms become mobile, they leave behind vacancies. In turn, the vacancies are also mobile, since they can be filled by other aluminum atoms which then open new vacancies. In the phenomenon of electromigration, the vacancies formed throughout the aluminum line tend to coalesce at flux divergence sites such as grain boundary triple points of the metal line, thereby forming voids that narrow the metal interconnect line as discussed above.
Once the metal interconnect line is narrowed, the current density passing through that portion of the line is increased. As a result, the increased current density accelerates the process of electromigration, thereby continually narrowing the line until the line fails.
It is also thought that void formation occurs as a result of stress migration inherent in aluminum line deposition. The deposition of the aluminum in the metal interconnect lines is usually conducted at an elevated temperature. As the aluminum in the line cools, the aluminum begins to contract. The insulation layer positioned under the aluminum layer, typically silicon dioxide, also contracts. Because the aluminum and the silicon dioxide have different coefficients of thermal expansion and contraction, however, the two materials contract at different rates. This contraction sets an internal stress within the aluminum portions of the metal interconnect lines. The same phenomenon can also occur when a subsequent layer is formed over the top of the aluminum portions of the lines. It is theorized that the energy resulting from the induced stress within the aluminum causes displacement of the aluminum atoms and coalescence of the resulting vacancies.
A further problem introduced by the miniaturization of metal interconnect lines is stress induced by grain boundary “pinning.” This pinning effect can lead to an increase in stress and further electromigration, along with an increase in film resistivity. Pinning occurs with polycrystalline materials such as titanium, which are formed of a microscopic grain structure. Since titanium has a much smaller grain structure than aluminum, when aluminum is deposited on to the titanium a much larger grain results on the surface, with much smaller grains being trapped underneath. During the final anneal the underlying layer shrinks and forms voids.
In one attempt to eliminate void formation, the aluminum is mixed with another metal to form an aluminum alloy. For example, copper has been added to aluminum. In turn, the copper appears to increase the energy required to cause the voids to form in the metal interconnect line. This remedy, however, is only partial, as void formation does occur over time, especially as the size of the metal interconnect line decreases. Titanium is also frequently deposited together with the aluminum and is alloyed to the aluminum with a high temperature anneal step.
Voids also form during post metal deposition anneals, which are typically conducted at temperatures of about 425° C. and for times of about 100 minutes. When Al is deposited on Titanium, the Titanium and Aluminum react to form TiAl
x
. As a result, the stress in the metal line increases due to a volume loss that occurs because of the density change which occurs during the reaction of converting Titanium and Aluminum to TiAl
x
. As a consequence, voids form to relieve the stress in the metal line.
One method used in the prior art for forming metal interconnect stacks with titanium and aluminum comprises first depositing a titanium layer, then depositing an overlying aluminum film, after which a titanium nitride layer is deposited above the aluminum and titanium layer. Finally, an anneal is conducted in a furnace at about 425° C. for about 100 minutes to alloy the titanium and aluminum. The titanium-aluminum alloy is used in order to retain certain properties such as electromigration resistance for preventing migration failures. Nevertheless, the smaller grain size of the titanium-aluminum alloy results in a lower conductivity, and a volume loss is sustained during the anneal, accompanied by an increase in the tensile stress of the titanium-al
Jones Deborah
Micro)n Technology, Inc.
Workman & Nydegger & Seeley
Young Bryant
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